107 lines
7.8 KiB
Tcl
107 lines
7.8 KiB
Tcl
# This file is automatically generated.
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# It contains project source information necessary for synthesis and implementation.
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# XDC: new/c64pro_pins_ads1299.xdc
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# XDC: new/c64pro_pins_ads1299_emg.xdc
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# XDC: new/c64pro_pins_ic.xdc
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# Block Designs: bd/design_a9_1/design_a9_1.bd
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1 || ORIG_REF_NAME==design_a9_1} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_0_0/design_a9_1_axi_bram_ctrl_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_0_0 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_1_0/design_a9_1_axi_bram_ctrl_1_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_1_0 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_1_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_2_0/design_a9_1_axi_bram_ctrl_2_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_2_0 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_2_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_3_0/design_a9_1_axi_bram_ctrl_3_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_3_0 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_3_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_4_0/design_a9_1_axi_bram_ctrl_4_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_4_0 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_4_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_dma_0_0/design_a9_1_axi_dma_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_dma_0_0 || ORIG_REF_NAME==design_a9_1_axi_dma_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_dma_1_0/design_a9_1_axi_dma_1_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_dma_1_0 || ORIG_REF_NAME==design_a9_1_axi_dma_1_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_gpio_0_0/design_a9_1_axi_gpio_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_gpio_0_0 || ORIG_REF_NAME==design_a9_1_axi_gpio_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_smc_0/design_a9_1_axi_smc_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_smc_0 || ORIG_REF_NAME==design_a9_1_axi_smc_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axis_data_fifo_0_0/design_a9_1_axis_data_fifo_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axis_data_fifo_0_0 || ORIG_REF_NAME==design_a9_1_axis_data_fifo_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axis_data_fifo_1_0/design_a9_1_axis_data_fifo_1_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axis_data_fifo_1_0 || ORIG_REF_NAME==design_a9_1_axis_data_fifo_1_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_processing_system7_0_0/design_a9_1_processing_system7_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_processing_system7_0_0 || ORIG_REF_NAME==design_a9_1_processing_system7_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_rst_ps7_0_50M_0/design_a9_1_rst_ps7_0_50M_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_rst_ps7_0_50M_0 || ORIG_REF_NAME==design_a9_1_rst_ps7_0_50M_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_smartconnect_0_0/design_a9_1_smartconnect_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_smartconnect_0_0 || ORIG_REF_NAME==design_a9_1_smartconnect_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_xlconcat_0_0/design_a9_1_xlconcat_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_xlconcat_0_0 || ORIG_REF_NAME==design_a9_1_xlconcat_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_gpio_1_0/design_a9_1_axi_gpio_1_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_gpio_1_0 || ORIG_REF_NAME==design_a9_1_axi_gpio_1_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_CHANN_EN_0/design_a9_1_CHANN_EN_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_CHANN_EN_0 || ORIG_REF_NAME==design_a9_1_CHANN_EN_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_CHANN_SEL_0/design_a9_1_CHANN_SEL_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_CHANN_SEL_0 || ORIG_REF_NAME==design_a9_1_CHANN_SEL_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_quad_spi_0_0/design_a9_1_axi_quad_spi_0_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_quad_spi_0_0 || ORIG_REF_NAME==design_a9_1_axi_quad_spi_0_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_CHANN_EN_1/design_a9_1_CHANN_EN_1.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_CHANN_EN_1 || ORIG_REF_NAME==design_a9_1_CHANN_EN_1} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_3_1/design_a9_1_axi_bram_ctrl_3_1.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_3_1 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_3_1} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_CHANN_EN_2/design_a9_1_CHANN_EN_2.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_CHANN_EN_2 || ORIG_REF_NAME==design_a9_1_CHANN_EN_2} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axis_data_fifo_1_1/design_a9_1_axis_data_fifo_1_1.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axis_data_fifo_1_1 || ORIG_REF_NAME==design_a9_1_axis_data_fifo_1_1} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_dma_1_1/design_a9_1_axi_dma_1_1.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_dma_1_1 || ORIG_REF_NAME==design_a9_1_axi_dma_1_1} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_dma_2_0/design_a9_1_axi_dma_2_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_dma_2_0 || ORIG_REF_NAME==design_a9_1_axi_dma_2_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axis_data_fifo_2_0/design_a9_1_axis_data_fifo_2_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axis_data_fifo_2_0 || ORIG_REF_NAME==design_a9_1_axis_data_fifo_2_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_ZCHECK_SPI_0/design_a9_1_ZCHECK_SPI_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_ZCHECK_SPI_0 || ORIG_REF_NAME==design_a9_1_ZCHECK_SPI_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_Z_IO_0/design_a9_1_Z_IO_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_Z_IO_0 || ORIG_REF_NAME==design_a9_1_Z_IO_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_5_0/design_a9_1_axi_bram_ctrl_5_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_5_0 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_5_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_axi_bram_ctrl_6_0/design_a9_1_axi_bram_ctrl_6_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_axi_bram_ctrl_6_0 || ORIG_REF_NAME==design_a9_1_axi_bram_ctrl_6_0} -quiet] -quiet
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# IP: bd/design_a9_1/ip/design_a9_1_STIM_SPI_0/design_a9_1_STIM_SPI_0.xci
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set_property KEEP_HIERARCHY SOFT [get_cells -hier -filter {REF_NAME==design_a9_1_STIM_SPI_0 || ORIG_REF_NAME==design_a9_1_STIM_SPI_0} -quiet] -quiet
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# XDC: d:/Project/spinal_stim/pl/spinal_stim_v10/c64_pro.gen/sources_1/bd/design_a9_1/design_a9_1_ooc.xdc
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