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2026-09-11 16:18:36 +08:00
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xelab.log
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Vivado Simulator v2023.1
Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
Running: C:/Xilinx/Vivado/2023.1/bin/unwrapped/win64.o/xelab.exe csi040_ctrl_tb -debug typical -snapshot csi040_ctrl_tb_sim_cn_comments
Multi-threading is on. Using 18 slave threads.
Starting static elaboration
Pass Through NonSizing Optimizer
Completed static elaboration
Starting simulation data flow analysis
Completed simulation data flow analysis
Time Resolution for simulation is 1ps
Compiling module work.csi040_spi_master(CLK_DIV=2,OPCO...
Compiling module work.csi040_ctrl(SPI_CLK_DIV=2,SPI_OP...
Compiling module work.csi040_ctrl_tb
Built simulation snapshot csi040_ctrl_tb_sim_cn_comments