16 lines
750 B
Plaintext
16 lines
750 B
Plaintext
Vivado Simulator v2023.1
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Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
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Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
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Running: C:/Xilinx/Vivado/2023.1/bin/unwrapped/win64.o/xelab.exe csi040_ctrl_tb -debug typical -snapshot csi040_ctrl_tb_sim_cn_comments
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Multi-threading is on. Using 18 slave threads.
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Starting static elaboration
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Pass Through NonSizing Optimizer
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Completed static elaboration
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Starting simulation data flow analysis
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Completed simulation data flow analysis
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Time Resolution for simulation is 1ps
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Compiling module work.csi040_spi_master(CLK_DIV=2,OPCO...
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Compiling module work.csi040_ctrl(SPI_CLK_DIV=2,SPI_OP...
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Compiling module work.csi040_ctrl_tb
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Built simulation snapshot csi040_ctrl_tb_sim_cn_comments
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