438 lines
14 KiB
Verilog
438 lines
14 KiB
Verilog
`timescale 1 ns / 1 ps
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module pl_top#
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(
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parameter VERSION = 32'h10000001 ,
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parameter CLK_FREQ = 100 ,
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parameter CLK_PERIOD = 10 ,
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//----------------------------------------- RHS2116
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parameter RSH2116_QTY = 4 ,
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parameter RHS2116_SPI_CLK_DIV = 4 ,
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parameter RSH2116_SPI_PERIOD = 1500 ,
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//----------------------------------------- ADS1299
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parameter ADS1299_QTY = 8 ,
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parameter ADS1299_CH = 8 ,
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parameter ADS1299_SPI_CLK_DIV = 4 ,
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parameter ADS1299_SPI_QTY = 4 ,
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parameter ADS1299_SPI_SLAVE_QTY = 2 ,
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parameter ADS1299_SPI_PERIOD = 2000
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)
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(
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input clk ,
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input rst_n ,
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//--------------------------------------------- PS:
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input [12:0] bram_stim_addr ,
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input bram_stim_clk ,
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input [31:0] bram_stim_din ,
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output [31:0] bram_stim_dout ,
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input bram_stim_en ,
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input bram_stim_rst ,
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input [ 3:0] bram_stim_we ,
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input [12:0] bram_eeg_addr ,
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input bram_eeg_clk ,
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input [31:0] bram_eeg_din ,
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output [31:0] bram_eeg_dout ,
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input bram_eeg_en ,
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input bram_eeg_rst ,
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input [ 3:0] bram_eeg_we ,
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input [12:0] bram_emg_addr ,
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input bram_emg_clk ,
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input [31:0] bram_emg_din ,
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output [31:0] bram_emg_dout ,
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input bram_emg_en ,
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input bram_emg_rst ,
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input [ 3:0] bram_emg_we ,
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input [12:0] bram_accel_addr ,
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input bram_accel_clk ,
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input [31:0] bram_accel_din ,
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output [31:0] bram_accel_dout ,
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input bram_accel_en ,
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input bram_accel_rst ,
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input [ 3:0] bram_accel_we ,
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input [12:0] bram_msg_addr ,
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input bram_msg_clk ,
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input [31:0] bram_msg_din ,
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output [31:0] bram_msg_dout ,
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input bram_msg_en ,
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input bram_msg_rst ,
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input [ 3:0] bram_msg_we ,
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//--------------------------------------------- interrupt
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output stim_int ,
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output eeg_int ,
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output emg_int ,
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output accel_int ,
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input [31:0] m_axis_stim_tdata ,
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input m_axis_stim_tlast ,
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output m_axis_stim_tready ,
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input m_axis_stim_tvalid ,
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input m_axis_record_tfull ,
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output [ 7:0] m_axis_record_tdata ,
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output [ 0:0] m_axis_record_tkeep ,
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output m_axis_record_tlast ,
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input m_axis_record_tready ,
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output m_axis_record_tvalid ,
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//--------------------------------------------- RSH2116
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output [RSH2116_QTY-1:0] rsh2116_enable ,
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output [RSH2116_QTY-1:0] rsh2116_spi_cs ,
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output [RSH2116_QTY-1:0] rsh2116_spi_sclk ,
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output [RSH2116_QTY-1:0] rsh2116_spi_mosi ,
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input [RSH2116_QTY-1:0] rsh2116_spi_miso ,
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//--------------------------------------------- ADS1299 for EEG
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output [ADS1299_QTY-1:0] eeg_ads1299_spi_cs ,
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output [ 4-1:0] eeg_ads1299_spi_sclk ,
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output [ 4-1:0] eeg_ads1299_spi_mosi ,
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input [ 4-1:0] eeg_ads1299_spi_miso ,
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input [ 4-1:0] eeg_ads1299_drdy_n ,
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output eeg_ads1299_start ,
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//--------------------------------------------- ADS1299 for EMG
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output emg_ads1299_spi_cs ,
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output emg_ads1299_spi_sclk ,
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output emg_ads1299_spi_mosi ,
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input emg_ads1299_spi_miso ,
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input emg_ads1299_drdy_n ,
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output emg_ads1299_start ,
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output emg_ads1299_reset_n ,
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output emg_ads1299_pwdn_n ,
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//------------------------------------------ device: MEMS
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output accel_spi_cs ,
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output accel_spi_sclk ,
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output accel_spi_mosi ,
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input accel_spi_miso ,
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input accel_int0 ,
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input accel_int1 ,
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//--------------------------------------------- ADG1414
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output adg1414_spi_sync ,
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output adg1414_spi_sclk ,
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output adg1414_spi_mosi ,
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input adg1414_spi_miso ,
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//--------------------------------------------- Trigger
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input trigger_reset ,
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input [32-1:0] trigger_in ,
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output [32-1:0] trigger_out ,
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//--------------------------------------------- For developer
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output [ 4-1:0] debug_sig
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);
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//*****************************************************************************
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// Parameter definition
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//*****************************************************************************
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//*****************************************************************************
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// Internal register and wire declarations
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//*****************************************************************************
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wire [32-1:0] trigger_in_int ;
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wire [32-1:0] trigger_in_ext ;
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wire [32-1:0] axis_trigger_tdata ;
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wire axis_trigger_tvalid ;
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wire axis_trigger_tready ;
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wire [32-1:0] axis_eeg16_tdata ;
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wire axis_eeg16_tlast ;
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wire axis_eeg16_tready ;
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wire axis_eeg16_tvalid ;
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wire [32-1:0] axis_eeg24_tdata ;
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wire axis_eeg24_tlast ;
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wire axis_eeg24_tready ;
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wire axis_eeg24_tvalid ;
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wire [32-1:0] axis_emg_tdata ;
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wire axis_emg_tlast ;
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wire axis_emg_tready ;
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wire axis_emg_tvalid ;
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wire [48-1:0] accel_data ;
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wire sw_enable ;
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wire sw_data_sel ;
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wire [64-1:0] sw_data_0 ;
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wire [64-1:0] sw_data_1 ;
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wire [64-1:0] sw_state ;
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wire [ 4-1:0] debug_sig_2116 ;
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wire [ 4-1:0] debug_sig_eeg ;
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wire [ 4-1:0] debug_sig_msg ;
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//*****************************************************************************
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// Instantiation
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//*****************************************************************************
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trigger_top#
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(
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.CLK_PERIOD ( CLK_PERIOD )
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)
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u_trigger_top
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(
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.clk ( clk ),
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.rst_n ( rst_n ),
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.trigger_reset ( trigger_reset ),
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.trigger_in_int ( trigger_in_int ),
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.trigger_in_ext ( trigger_in_ext ),
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.m_trigger_tdata ( axis_trigger_tdata ),
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.m_trigger_tvalid ( axis_trigger_tvalid ),
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.m_trigger_tready ( axis_trigger_tready ),
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.error_overflow ( )
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);
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rhs2116_top#
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(
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.CLK_PERIOD ( CLK_PERIOD ),
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.VERSION ( VERSION ),
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.SPI_CLK_DIV ( RHS2116_SPI_CLK_DIV ),
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.CHIPSET_QTY ( RSH2116_QTY ),
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.SPI_TRANS_PERIOD ( RSH2116_SPI_PERIOD )
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)
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u_rhs2116_top
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(
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.clk ( clk ),
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.rst_n ( rst_n ),
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.bram_addr ( bram_stim_addr ),
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.bram_clk ( bram_stim_clk ),
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.bram_din ( bram_stim_din ),
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.bram_dout ( bram_stim_dout ),
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.bram_en ( bram_stim_en ),
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.bram_rst ( bram_stim_rst ),
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.bram_we ( bram_stim_we ),
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.interrupt ( stim_int ),
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.stim_event_code ( trigger_in_int ),
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//------------------------------------------ FIFO: stim input and record output
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.axi_str_txd_tdata ( m_axis_stim_tdata ),
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.axi_str_txd_tlast ( m_axis_stim_tlast ),
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.axi_str_txd_tready ( m_axis_stim_tready ),
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.axi_str_txd_tvalid ( m_axis_stim_tvalid ),
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.axi_str_rxd_tdata ( axis_eeg16_tdata ),
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.axi_str_rxd_tlast ( axis_eeg16_tlast ),
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.axi_str_rxd_tready ( axis_eeg16_tready ),
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.axi_str_rxd_tvalid ( axis_eeg16_tvalid ),
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//------------------------------------------ channel stim state
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.sw_enable ( sw_enable ),
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.sw_data_sel ( sw_data_sel ),
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.sw_data_0 ( sw_data_0 ),
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.sw_data_1 ( sw_data_1 ),
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.sw_state ( sw_state ),
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//------------------------------------------ device
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.stim_en ( rsh2116_enable ),
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.cs ( rsh2116_spi_cs ),
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.sclk ( rsh2116_spi_sclk ),
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.mosi ( rsh2116_spi_mosi ),
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.miso ( rsh2116_spi_miso ),
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.debug_sig ( debug_sig_2116 )
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);
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eeg_top#
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(
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.CLK_PERIOD ( CLK_PERIOD )
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)
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u_eeg_top
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(
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.clk ( clk ),
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.rst_n ( rst_n ),
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.bram_addr ( bram_eeg_addr ),
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.bram_clk ( bram_eeg_clk ),
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.bram_din ( bram_eeg_din ),
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.bram_dout ( bram_eeg_dout ),
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.bram_en ( bram_eeg_en ),
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.bram_rst ( bram_eeg_rst ),
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.bram_we ( bram_eeg_we ),
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.interrupt ( eeg_int ),
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//------------------------------------------ FIFO: eeg output
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.axis_record_tdata ( axis_eeg24_tdata ),
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.axis_record_tlast ( axis_eeg24_tlast ),
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.axis_record_tready ( axis_eeg24_tready ),
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.axis_record_tvalid ( axis_eeg24_tvalid ),
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//------------------------------------------ device spi
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.cs ( eeg_ads1299_spi_cs ),
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.sclk ( eeg_ads1299_spi_sclk ),
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.mosi ( eeg_ads1299_spi_mosi ),
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.miso ( eeg_ads1299_spi_miso ),
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.drdy ( eeg_ads1299_drdy_n ),
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.start ( eeg_ads1299_start ),
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//------------------------------------------ debug signal
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.debug_sig ( debug_sig_eeg )
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);
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emg_top#
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(
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.CLK_PERIOD ( CLK_PERIOD )
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)
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u_emg_top
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(
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.clk ( clk ),
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.rst_n ( rst_n ),
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.bram_addr ( bram_emg_addr ),
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.bram_clk ( bram_emg_clk ),
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.bram_din ( bram_emg_din ),
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.bram_dout ( bram_emg_dout ),
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.bram_en ( bram_emg_en ),
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.bram_rst ( bram_emg_rst ),
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.bram_we ( bram_emg_we ),
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.interrupt ( emg_int ),
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//------------------------------------------ FIFO: emg output
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.axis_txd_tdata ( axis_emg_tdata ),
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.axis_txd_tlast ( axis_emg_tlast ),
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.axis_txd_tready ( axis_emg_tready ),
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.axis_txd_tvalid ( axis_emg_tvalid ),
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//------------------------------------------ device interface
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.cs ( emg_ads1299_spi_cs ),
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.sclk ( emg_ads1299_spi_sclk ),
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.mosi ( emg_ads1299_spi_mosi ),
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.miso ( emg_ads1299_spi_miso ),
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.drdy ( emg_ads1299_drdy_n ),
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.start ( emg_ads1299_start ),
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.reset_n ( emg_ads1299_reset_n ),
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.pwdn_n ( emg_ads1299_pwdn_n )
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);
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accel_top#
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(
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.CLK_PERIOD ( CLK_PERIOD )
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)
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u_accel_top
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(
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.clk ( clk ),
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.rst_n ( rst_n ),
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.bram_addr ( bram_accel_addr ),
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.bram_clk ( bram_accel_clk ),
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.bram_din ( bram_accel_din ),
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.bram_dout ( bram_accel_dout ),
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.bram_en ( bram_accel_en ),
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.bram_rst ( bram_accel_rst ),
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.bram_we ( bram_accel_we ),
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.interrupt ( accel_int ),
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.accel_data ( accel_data ),
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.accel_spi_cs ( accel_spi_cs ),
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.accel_spi_sclk ( accel_spi_sclk ),
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.accel_spi_mosi ( accel_spi_mosi ),
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.accel_spi_miso ( accel_spi_miso ),
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.accel_int0 ( accel_int0 ),
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.accel_int1 ( accel_int1 )
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);
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channel_switch#
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(
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.CLK_PERIOD ( CLK_PERIOD )
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)
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u_channel_switch
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(
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.clk ( clk ),
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.rst_n ( rst_n ),
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.enable ( sw_enable ),
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.data_sel ( sw_data_sel ),
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.data_0 ( sw_data_0 ),
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.data_1 ( sw_data_1 ),
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.state ( sw_state ),
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.sync ( adg1414_spi_sync ),
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.sclk ( adg1414_spi_sclk ),
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.sdin ( adg1414_spi_mosi ),
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.sdo ( adg1414_spi_miso )
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);
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upload_top#
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(
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.CLK_PERIOD ( CLK_PERIOD )
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)
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u_upload_top
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(
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.clk ( clk ),
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.rst_n ( rst_n ),
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//------------------------------------------ config
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.bram_addr ( bram_msg_addr ),
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.bram_clk ( bram_msg_clk ),
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.bram_din ( bram_msg_din ),
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.bram_dout ( bram_msg_dout ),
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.bram_en ( bram_msg_en ),
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.bram_rst ( bram_msg_rst ),
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.bram_we ( bram_msg_we ),
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//------------------------------------------ recive
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.s_axis_trigger_tdata ( axis_trigger_tdata ),
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.s_axis_trigger_tvalid ( axis_trigger_tvalid ),
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.s_axis_trigger_tready ( axis_trigger_tready ),
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.s_axis_eeg16_tdata ( axis_eeg16_tdata ),
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.s_axis_eeg16_tlast ( axis_eeg16_tlast ),
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.s_axis_eeg16_tready ( axis_eeg16_tready ),
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.s_axis_eeg16_tvalid ( axis_eeg16_tvalid ),
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.s_axis_eeg24_tdata ( axis_eeg24_tdata ),
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.s_axis_eeg24_tlast ( axis_eeg24_tlast ),
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.s_axis_eeg24_tready ( axis_eeg24_tready ),
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.s_axis_eeg24_tvalid ( axis_eeg24_tvalid ),
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.s_axis_emg_tdata ( axis_emg_tdata ),
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.s_axis_emg_tlast ( axis_emg_tlast ),
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.s_axis_emg_tready ( axis_emg_tready ),
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.s_axis_emg_tvalid ( axis_emg_tvalid ),
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.accel_data ( accel_data ),
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//------------------------------------------ upload
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.m_axis_record_tfull ( m_axis_record_tfull ),
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.m_axis_record_tdata ( m_axis_record_tdata ),
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.m_axis_record_tkeep ( m_axis_record_tkeep ),
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.m_axis_record_tlast ( m_axis_record_tlast ),
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.m_axis_record_tready ( m_axis_record_tready ),
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.m_axis_record_tvalid ( m_axis_record_tvalid ),
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//------------------------------------------ debug signal
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.debug_sig ( debug_sig_msg )
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);
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//*****************************************************************************
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// Wire assignment
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//*****************************************************************************
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assign trigger_in_ext = trigger_in;
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assign trigger_out = trigger_in_int;
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assign debug_sig = debug_sig_2116;
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// assign debug_sig[0] = axis_eeg24_tvalid;
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// assign debug_sig[1] = axis_eeg24_tlast;
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// assign debug_sig[2] = axis_eeg24_tready;
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// assign debug_sig[3] = 1'b0;
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endmodule
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