GEM/BSI-901-fpga-software
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BSI-901-fpga-software/c64_pro.ip_user_files/bd/design_a9_1/ip
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chunk-sync c315cef09e sync chunk 10/12
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design_a9_1_axi_bram_ctrl_0_0
上传PL工程
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design_a9_1_axi_bram_ctrl_1_0
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design_a9_1_axi_bram_ctrl_2_0
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design_a9_1_axi_bram_ctrl_3_0
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design_a9_1_axi_bram_ctrl_3_1
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design_a9_1_axi_bram_ctrl_4_0
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design_a9_1_axi_bram_ctrl_5_0
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design_a9_1_axi_bram_ctrl_6_0
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design_a9_1_axi_dma_0_0
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design_a9_1_axi_dma_1_0
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design_a9_1_axi_dma_1_1
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design_a9_1_axi_dma_2_0
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design_a9_1_axi_gpio_0_0
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design_a9_1_axi_gpio_1_0
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design_a9_1_axi_gpio_1_1
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design_a9_1_axi_iic_0_0
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design_a9_1_axi_iic_1_0
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design_a9_1_axi_quad_spi_0_0
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design_a9_1_axi_smc_0
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design_a9_1_axis_data_fifo_0_0
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design_a9_1_axis_data_fifo_1_0
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design_a9_1_axis_data_fifo_1_1
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design_a9_1_axis_data_fifo_2_0
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design_a9_1_CHANN_EN_0
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design_a9_1_CHANN_EN_1
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design_a9_1_CHANN_EN_2
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design_a9_1_CHANN_SEL_0
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design_a9_1_processing_system7_0_0
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design_a9_1_rst_ps7_0_50M_0
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design_a9_1_smartconnect_0_0
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design_a9_1_STIM_SPI_0
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design_a9_1_xlconcat_0_0/sim
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design_a9_1_Z_IO_0
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design_a9_1_ZCHECK_SPI1_0
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design_a9_1_ZCHECK_SPI_0
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