Files
BSI-901-fpga-software/c64_pro.sim/sim_1/behav/xsim/xsim.ini.bak
T

503 lines
29 KiB
Plaintext

std=$RDI_DATADIR/xsim/vhdl/std
ieee=$RDI_DATADIR/xsim/vhdl/ieee
ieee_proposed=$RDI_DATADIR/xsim/vhdl/ieee_proposed
vl=$RDI_DATADIR/xsim/vhdl/vl
synopsys=$RDI_DATADIR/xsim/vhdl/synopsys
uvm=$RDI_DATADIR/xsim/system_verilog/uvm
secureip=$RDI_DATADIR/xsim/verilog/secureip
unisim=$RDI_DATADIR/xsim/vhdl/unisim
unimacro=$RDI_DATADIR/xsim/vhdl/unimacro
unifast=$RDI_DATADIR/xsim/vhdl/unifast
unisims_ver=$RDI_DATADIR/xsim/verilog/unisims_ver
unimacro_ver=$RDI_DATADIR/xsim/verilog/unimacro_ver
unifast_ver=$RDI_DATADIR/xsim/verilog/unifast_ver
simprims_ver=$RDI_DATADIR/xsim/verilog/simprims_ver
xlslice_v1_0_2=$RDI_DATADIR/xsim/ip/xlslice_v1_0_2
axi_mm2s_mapper_v1_1_27=$RDI_DATADIR/xsim/ip/axi_mm2s_mapper_v1_1_27
xbip_addsub_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_addsub_v3_0_6
versal_cips_ps_vip_v1_0_6=$RDI_DATADIR/xsim/ip/versal_cips_ps_vip_v1_0_6
xsdbm_v3_0_0=$RDI_DATADIR/xsim/ip/xsdbm_v3_0_0
fec_5g_common_v1_1_2=$RDI_DATADIR/xsim/ip/fec_5g_common_v1_1_2
av_pat_gen_v2_0_1=$RDI_DATADIR/xsim/ip/av_pat_gen_v2_0_1
ldpc_5gnr_lite_v1_0_0=$RDI_DATADIR/xsim/ip/ldpc_5gnr_lite_v1_0_0
cpm4_v1_0_12=$RDI_DATADIR/xsim/ip/cpm4_v1_0_12
ieee802d3_rs_fec_v2_0_19=$RDI_DATADIR/xsim/ip/ieee802d3_rs_fec_v2_0_19
oddr_v1_0_2=$RDI_DATADIR/xsim/ip/oddr_v1_0_2
tmr_inject_v1_0_4=$RDI_DATADIR/xsim/ip/tmr_inject_v1_0_4
c_mux_bus_v12_0_6=$RDI_DATADIR/xsim/ip/c_mux_bus_v12_0_6
c_gate_bit_v12_0_6=$RDI_DATADIR/xsim/ip/c_gate_bit_v12_0_6
axi_jtag_v1_0_0=$RDI_DATADIR/xsim/ip/axi_jtag_v1_0_0
xbip_bram18k_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_bram18k_v3_0_6
picxo=$RDI_DATADIR/xsim/ip/picxo
v_warp_init_v1_1_1=$RDI_DATADIR/xsim/ip/v_warp_init_v1_1_1
srio_gen2_v4_1_17=$RDI_DATADIR/xsim/ip/srio_gen2_v4_1_17
remote_port_c_v4=$RDI_DATADIR/xsim/ip/remote_port_c_v4
axi_sideband_util_v1_0_12=$RDI_DATADIR/xsim/ip/axi_sideband_util_v1_0_12
fir_compiler_v7_2_19=$RDI_DATADIR/xsim/ip/fir_compiler_v7_2_19
mutex_v2_1_11=$RDI_DATADIR/xsim/ip/mutex_v2_1_11
v_smpte_uhdsdi_v1_0_9=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_v1_0_9
gtwizard_ultrascale_v1_5_4=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_5_4
g709_rs_encoder_v2_2_9=$RDI_DATADIR/xsim/ip/g709_rs_encoder_v2_2_9
xbip_dsp48_multacc_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_dsp48_multacc_v3_0_6
stm_v1_0=$RDI_DATADIR/xsim/ip/stm_v1_0
fifo_generator_v13_1_4=$RDI_DATADIR/xsim/ip/fifo_generator_v13_1_4
v_uhdsdi_audio_v2_0_6=$RDI_DATADIR/xsim/ip/v_uhdsdi_audio_v2_0_6
cmac_v2_6_11=$RDI_DATADIR/xsim/ip/cmac_v2_6_11
axis_dbg_stub_v1_0_0=$RDI_DATADIR/xsim/ip/axis_dbg_stub_v1_0_0
ten_gig_eth_mac_v15_1_10=$RDI_DATADIR/xsim/ip/ten_gig_eth_mac_v15_1_10
xscl=$RDI_DATADIR/xsim/ip/xscl
aie_xtlm_v1_0_0=$RDI_DATADIR/xsim/ip/aie_xtlm_v1_0_0
v_smpte_uhdsdi_tx_v1_0_2=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_tx_v1_0_2
axis_combiner_v1_1_26=$RDI_DATADIR/xsim/ip/axis_combiner_v1_1_26
xdma_v4_1_23=$RDI_DATADIR/xsim/ip/xdma_v4_1_23
util_vector_logic_v2_0_2=$RDI_DATADIR/xsim/ip/util_vector_logic_v2_0_2
psx_vip_v1_0_1=$RDI_DATADIR/xsim/ip/psx_vip_v1_0_1
tmr_voter_v1_0_4=$RDI_DATADIR/xsim/ip/tmr_voter_v1_0_4
axis_vio_v1_0_8=$RDI_DATADIR/xsim/ip/axis_vio_v1_0_8
pcie_qdma_mailbox_v1_0_1=$RDI_DATADIR/xsim/ip/pcie_qdma_mailbox_v1_0_1
axi_infrastructure_v1_1_0=$RDI_DATADIR/xsim/ip/axi_infrastructure_v1_1_0
axi_amm_bridge_v1_0_18=$RDI_DATADIR/xsim/ip/axi_amm_bridge_v1_0_18
axi_tg_sc_v1_0=$RDI_DATADIR/xsim/ip/axi_tg_sc_v1_0
qdma_v5_0_3=$RDI_DATADIR/xsim/ip/qdma_v5_0_3
noc_nps4_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nps4_v1_0_0
vitis_deadlock_detector_v1_0_1=$RDI_DATADIR/xsim/ip/vitis_deadlock_detector_v1_0_1
noc_sc_v1_0_0=$RDI_DATADIR/xsim/ip/noc_sc_v1_0_0
audio_tpg_v1_0_0=$RDI_DATADIR/xsim/ip/audio_tpg_v1_0_0
axis_cap_ctrl_v1_0_0=$RDI_DATADIR/xsim/ip/axis_cap_ctrl_v1_0_0
rst_vip_v1_0_4=$RDI_DATADIR/xsim/ip/rst_vip_v1_0_4
axi_uartlite_v2_0_32=$RDI_DATADIR/xsim/ip/axi_uartlite_v2_0_32
an_lt_v1_0_9=$RDI_DATADIR/xsim/ip/an_lt_v1_0_9
xbip_dsp48_multadd_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_dsp48_multadd_v3_0_6
rs_encoder_v9_0_18=$RDI_DATADIR/xsim/ip/rs_encoder_v9_0_18
axi_dwidth_converter_v2_1_28=$RDI_DATADIR/xsim/ip/axi_dwidth_converter_v2_1_28
axis_mu_v1_0_0=$RDI_DATADIR/xsim/ip/axis_mu_v1_0_0
axi_uart16550_v2_0_30=$RDI_DATADIR/xsim/ip/axi_uart16550_v2_0_30
axis_switch_sc_v1_1=$RDI_DATADIR/xsim/ip/axis_switch_sc_v1_1
axi_interface_monitor_v1_1_0=$RDI_DATADIR/xsim/ip/axi_interface_monitor_v1_1_0
v_demosaic_v1_1_7=$RDI_DATADIR/xsim/ip/v_demosaic_v1_1_7
ll_compress_v1_1_0=$RDI_DATADIR/xsim/ip/ll_compress_v1_1_0
dfx_decoupler_v1_0_6=$RDI_DATADIR/xsim/ip/dfx_decoupler_v1_0_6
emb_mem_gen_v1_0_7=$RDI_DATADIR/xsim/ip/emb_mem_gen_v1_0_7
pc_cfr_v7_1_0=$RDI_DATADIR/xsim/ip/pc_cfr_v7_1_0
mipi_dsi_tx_ctrl_v1_0_7=$RDI_DATADIR/xsim/ip/mipi_dsi_tx_ctrl_v1_0_7
c_counter_binary_v12_0_16=$RDI_DATADIR/xsim/ip/c_counter_binary_v12_0_16
ptp_1588_timer_syncer_v2_0_4=$RDI_DATADIR/xsim/ip/ptp_1588_timer_syncer_v2_0_4
v_warp_init_v1_0_2=$RDI_DATADIR/xsim/ip/v_warp_init_v1_0_2
axis_switch_v1_1_28=$RDI_DATADIR/xsim/ip/axis_switch_v1_1_28
icap_arb_v1_0_1=$RDI_DATADIR/xsim/ip/icap_arb_v1_0_1
mdm_v3_2_24=$RDI_DATADIR/xsim/ip/mdm_v3_2_24
xbip_dsp48_addsub_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_dsp48_addsub_v3_0_6
hdcp22_rng_v1_0_1=$RDI_DATADIR/xsim/ip/hdcp22_rng_v1_0_1
sem_ultra_v3_1_24=$RDI_DATADIR/xsim/ip/sem_ultra_v3_1_24
v_gamma_lut_v1_1_7=$RDI_DATADIR/xsim/ip/v_gamma_lut_v1_1_7
axi_data_fifo_v2_1_27=$RDI_DATADIR/xsim/ip/axi_data_fifo_v2_1_27
util_reduced_logic_v2_0_4=$RDI_DATADIR/xsim/ip/util_reduced_logic_v2_0_4
sd_fec_v1_1_11=$RDI_DATADIR/xsim/ip/sd_fec_v1_1_11
spdif_v2_0_27=$RDI_DATADIR/xsim/ip/spdif_v2_0_27
noc_nps_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nps_v1_0_0
sim_qdma_cpp_v1_0=$RDI_DATADIR/xsim/ip/sim_qdma_cpp_v1_0
axi_remapper_tx_v1_0_0=$RDI_DATADIR/xsim/ip/axi_remapper_tx_v1_0_0
ibert_lib_v1_0_8=$RDI_DATADIR/xsim/ip/ibert_lib_v1_0_8
ernic_v4_0_1=$RDI_DATADIR/xsim/ip/ernic_v4_0_1
common_cpp_v1_0=$RDI_DATADIR/xsim/ip/common_cpp_v1_0
iomodule_v3_1_8=$RDI_DATADIR/xsim/ip/iomodule_v3_1_8
rwd_tlmmodel_v1=$RDI_DATADIR/xsim/ip/rwd_tlmmodel_v1
v_scenechange_v1_1_4=$RDI_DATADIR/xsim/ip/v_scenechange_v1_1_4
v_mix_v5_2_5=$RDI_DATADIR/xsim/ip/v_mix_v5_2_5
ieee802d3_50g_rs_fec_v2_0_15=$RDI_DATADIR/xsim/ip/ieee802d3_50g_rs_fec_v2_0_15
v_sdi_rx_vid_bridge_v2_0_0=$RDI_DATADIR/xsim/ip/v_sdi_rx_vid_bridge_v2_0_0
axis_infrastructure_v1_1_0=$RDI_DATADIR/xsim/ip/axis_infrastructure_v1_1_0
iomodule_v3_0=$RDI_DATADIR/xsim/ip/iomodule_v3_0
system_cache_v5_0_9=$RDI_DATADIR/xsim/ip/system_cache_v5_0_9
xxv_ethernet_v4_1_4=$RDI_DATADIR/xsim/ip/xxv_ethernet_v4_1_4
v_deinterlacer_v5_1_0=$RDI_DATADIR/xsim/ip/v_deinterlacer_v5_1_0
lmb_v10_v3_0_12=$RDI_DATADIR/xsim/ip/lmb_v10_v3_0_12
sid_v8_0_18=$RDI_DATADIR/xsim/ip/sid_v8_0_18
hw_trace=$RDI_DATADIR/xsim/ip/hw_trace
remote_port_sc_v4=$RDI_DATADIR/xsim/ip/remote_port_sc_v4
ltlib_v1_0_0=$RDI_DATADIR/xsim/ip/ltlib_v1_0_0
v_frmbuf_wr_v2_4_0=$RDI_DATADIR/xsim/ip/v_frmbuf_wr_v2_4_0
xbip_counter_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_counter_v3_0_6
common_rpc_v1=$RDI_DATADIR/xsim/ip/common_rpc_v1
hdcp_keymngmt_blk_v1_0_0=$RDI_DATADIR/xsim/ip/hdcp_keymngmt_blk_v1_0_0
xpm_cdc_gen_v1_0_2=$RDI_DATADIR/xsim/ip/xpm_cdc_gen_v1_0_2
dfx_bitstream_monitor_v1_0_2=$RDI_DATADIR/xsim/ip/dfx_bitstream_monitor_v1_0_2
xbip_dsp48_mult_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_dsp48_mult_v3_0_6
rama_v1_1_14_lib=$RDI_DATADIR/xsim/ip/rama_v1_1_14_lib
convolution_v9_0_17=$RDI_DATADIR/xsim/ip/convolution_v9_0_17
xbip_multadd_v3_0_17=$RDI_DATADIR/xsim/ip/xbip_multadd_v3_0_17
high_speed_selectio_wiz_v3_6_5=$RDI_DATADIR/xsim/ip/high_speed_selectio_wiz_v3_6_5
axi_iic_v2_1_4=$RDI_DATADIR/xsim/ip/axi_iic_v2_1_4
ats_switch_v1_0_7=$RDI_DATADIR/xsim/ip/ats_switch_v1_0_7
fast_adapter_v1_0_5=$RDI_DATADIR/xsim/ip/fast_adapter_v1_0_5
gigantic_mux=$RDI_DATADIR/xsim/ip/gigantic_mux
v_hdmi_tx1_v1_0_5=$RDI_DATADIR/xsim/ip/v_hdmi_tx1_v1_0_5
blk_mem_gen_v8_4_6=$RDI_DATADIR/xsim/ip/blk_mem_gen_v8_4_6
soft_ecc_proxy_v1_0_2=$RDI_DATADIR/xsim/ip/soft_ecc_proxy_v1_0_2
xlconstant_v1_1_7=$RDI_DATADIR/xsim/ip/xlconstant_v1_1_7
pc_cfr_v7_2_1=$RDI_DATADIR/xsim/ip/pc_cfr_v7_2_1
xtlm_trace_model_v1_0=$RDI_DATADIR/xsim/ip/xtlm_trace_model_v1_0
hdmi_gt_controller_v1_0_11=$RDI_DATADIR/xsim/ip/hdmi_gt_controller_v1_0_11
switch_core_top_v1_0_12=$RDI_DATADIR/xsim/ip/switch_core_top_v1_0_12
lte_fft_v2_0_23=$RDI_DATADIR/xsim/ip/lte_fft_v2_0_23
v_tpg_v8_0_11=$RDI_DATADIR/xsim/ip/v_tpg_v8_0_11
floating_point_v7_1_15=$RDI_DATADIR/xsim/ip/floating_point_v7_1_15
hdmi_acr_ctrl_v1_0_1=$RDI_DATADIR/xsim/ip/hdmi_acr_ctrl_v1_0_1
v_frmbuf_rd_v2_3_3=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_3_3
axi_firewall_v1_2_3=$RDI_DATADIR/xsim/ip/axi_firewall_v1_2_3
axi_mmu_v2_1_26=$RDI_DATADIR/xsim/ip/axi_mmu_v2_1_26
v_tc_v6_2_6=$RDI_DATADIR/xsim/ip/v_tc_v6_2_6
ll_compress_v1_0_0=$RDI_DATADIR/xsim/ip/ll_compress_v1_0_0
displayport_v7_0_0=$RDI_DATADIR/xsim/ip/displayport_v7_0_0
fc32_rs_fec_v1_0_25=$RDI_DATADIR/xsim/ip/fc32_rs_fec_v1_0_25
bsip_v1_1_0=$RDI_DATADIR/xsim/ip/bsip_v1_1_0
v_vid_in_axi4s_v4_0_9=$RDI_DATADIR/xsim/ip/v_vid_in_axi4s_v4_0_9
xtlm=$RDI_DATADIR/xsim/ip/xtlm
dist_mem_gen_v8_0_13=$RDI_DATADIR/xsim/ip/dist_mem_gen_v8_0_13
sim_xdma_sc_v1=$RDI_DATADIR/xsim/ip/sim_xdma_sc_v1
tmr_manager_v1_0_10=$RDI_DATADIR/xsim/ip/tmr_manager_v1_0_10
dft_v4_0_16=$RDI_DATADIR/xsim/ip/dft_v4_0_16
xpm=$RDI_DATADIR/xsim/ip/xpm
ft_prach_v1_1_0=$RDI_DATADIR/xsim/ip/ft_prach_v1_1_0
axi_apb_bridge_v3_0_18=$RDI_DATADIR/xsim/ip/axi_apb_bridge_v3_0_18
axi_firewall_v1_1_7=$RDI_DATADIR/xsim/ip/axi_firewall_v1_1_7
c_mux_bit_v12_0_6=$RDI_DATADIR/xsim/ip/c_mux_bit_v12_0_6
tsn_endpoint_ethernet_mac_block_v1_0_13=$RDI_DATADIR/xsim/ip/tsn_endpoint_ethernet_mac_block_v1_0_13
axis_data_fifo_v2_0_10=$RDI_DATADIR/xsim/ip/axis_data_fifo_v2_0_10
lib_pkg_v1_0_2=$RDI_DATADIR/xsim/ip/lib_pkg_v1_0_2
microblaze_v11_0_11=$RDI_DATADIR/xsim/ip/microblaze_v11_0_11
axi_clock_converter_v2_1_27=$RDI_DATADIR/xsim/ip/axi_clock_converter_v2_1_27
cpri_v8_11_16=$RDI_DATADIR/xsim/ip/cpri_v8_11_16
tmr_comparator_v1_0_5=$RDI_DATADIR/xsim/ip/tmr_comparator_v1_0_5
floating_point_v7_0_20=$RDI_DATADIR/xsim/ip/floating_point_v7_0_20
uhdsdi_gt_v2_1_2=$RDI_DATADIR/xsim/ip/uhdsdi_gt_v2_1_2
flexo_100g_rs_fec_v1_0_25=$RDI_DATADIR/xsim/ip/flexo_100g_rs_fec_v1_0_25
pci32_v5_0_12=$RDI_DATADIR/xsim/ip/pci32_v5_0_12
quadsgmii_v3_5_12=$RDI_DATADIR/xsim/ip/quadsgmii_v3_5_12
blk_mem_gen_v8_3_6=$RDI_DATADIR/xsim/ip/blk_mem_gen_v8_3_6
mpram_v1_0_0=$RDI_DATADIR/xsim/ip/mpram_v1_0_0
rs_decoder_v9_0_19=$RDI_DATADIR/xsim/ip/rs_decoder_v9_0_19
v_hdmi_tx_v3_0_2=$RDI_DATADIR/xsim/ip/v_hdmi_tx_v3_0_2
pcie_axi4lite_tap_v1_0_1=$RDI_DATADIR/xsim/ip/pcie_axi4lite_tap_v1_0_1
ai_pl=$RDI_DATADIR/xsim/ip/ai_pl
pc_cfr_v6_4_2=$RDI_DATADIR/xsim/ip/pc_cfr_v6_4_2
axis_clock_converter_v1_1_29=$RDI_DATADIR/xsim/ip/axis_clock_converter_v1_1_29
dprx_fec_8b10b_v1_0_1=$RDI_DATADIR/xsim/ip/dprx_fec_8b10b_v1_0_1
cpm5_v1_0_12=$RDI_DATADIR/xsim/ip/cpm5_v1_0_12
vid_phy_controller_v2_1_16=$RDI_DATADIR/xsim/ip/vid_phy_controller_v2_1_16
axi_utils_v2_0_6=$RDI_DATADIR/xsim/ip/axi_utils_v2_0_6
emb_fifo_gen_v1_0_3=$RDI_DATADIR/xsim/ip/emb_fifo_gen_v1_0_3
versal_cips_v3_2_5=$RDI_DATADIR/xsim/ip/versal_cips_v3_2_5
ernic_v3_1_3=$RDI_DATADIR/xsim/ip/ernic_v3_1_3
ahblite_axi_bridge_v3_0_23=$RDI_DATADIR/xsim/ip/ahblite_axi_bridge_v3_0_23
ieee802d3_400g_rs_fec_v3_0_0=$RDI_DATADIR/xsim/ip/ieee802d3_400g_rs_fec_v3_0_0
interlaken_v2_4_15=$RDI_DATADIR/xsim/ip/interlaken_v2_4_15
v_vid_sdi_tx_bridge_v2_0_0=$RDI_DATADIR/xsim/ip/v_vid_sdi_tx_bridge_v2_0_0
ll_compress_v2_1_1=$RDI_DATADIR/xsim/ip/ll_compress_v2_1_1
xsdbs_v1_0_2=$RDI_DATADIR/xsim/ip/xsdbs_v1_0_2
axi_emc_v3_0_28=$RDI_DATADIR/xsim/ip/axi_emc_v3_0_28
tcc_encoder_3gpp_v5_0_19=$RDI_DATADIR/xsim/ip/tcc_encoder_3gpp_v5_0_19
div_gen_v5_1_19=$RDI_DATADIR/xsim/ip/div_gen_v5_1_19
emc_common_v3_0_5=$RDI_DATADIR/xsim/ip/emc_common_v3_0_5
axi_ethernetlite_v3_0_27=$RDI_DATADIR/xsim/ip/axi_ethernetlite_v3_0_27
noc_nmu_phydir_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nmu_phydir_v1_0_0
pci64_v5_0_11=$RDI_DATADIR/xsim/ip/pci64_v5_0_11
xdfe_nlf_v1_0_3=$RDI_DATADIR/xsim/ip/xdfe_nlf_v1_0_3
xdfe_fft_v1_0_4=$RDI_DATADIR/xsim/ip/xdfe_fft_v1_0_4
sim_ddr_v1_0=$RDI_DATADIR/xsim/ip/sim_ddr_v1_0
v_multi_scaler_v1_2_3=$RDI_DATADIR/xsim/ip/v_multi_scaler_v1_2_3
audio_clock_recovery_unit_v1_0_2=$RDI_DATADIR/xsim/ip/audio_clock_recovery_unit_v1_0_2
v_hcresampler_v1_1_7=$RDI_DATADIR/xsim/ip/v_hcresampler_v1_1_7
c_accum_v12_0_15=$RDI_DATADIR/xsim/ip/c_accum_v12_0_15
mpegtsmux_v1_1_6=$RDI_DATADIR/xsim/ip/mpegtsmux_v1_1_6
axi_crossbar_v2_1_29=$RDI_DATADIR/xsim/ip/axi_crossbar_v2_1_29
multi_channel_25g_rs_fec_v1_0_22=$RDI_DATADIR/xsim/ip/multi_channel_25g_rs_fec_v1_0_22
sim_trig_v1_0_9=$RDI_DATADIR/xsim/ip/sim_trig_v1_0_9
axi_mcdma_v1_1_9=$RDI_DATADIR/xsim/ip/axi_mcdma_v1_1_9
zynq_ultra_ps_e_vip_v1_0_14=$RDI_DATADIR/xsim/ip/zynq_ultra_ps_e_vip_v1_0_14
jtag_axi=$RDI_DATADIR/xsim/ip/jtag_axi
c_shift_ram_v12_0_14=$RDI_DATADIR/xsim/ip/c_shift_ram_v12_0_14
hdcp22_cipher_v1_0_3=$RDI_DATADIR/xsim/ip/hdcp22_cipher_v1_0_3
xdfe_equalizer_v1_0_6=$RDI_DATADIR/xsim/ip/xdfe_equalizer_v1_0_6
axi4svideo_bridge_v1_0_16=$RDI_DATADIR/xsim/ip/axi4svideo_bridge_v1_0_16
clk_gen_sim_v1_0_3=$RDI_DATADIR/xsim/ip/clk_gen_sim_v1_0_3
generic_baseblocks_v2_1_0=$RDI_DATADIR/xsim/ip/generic_baseblocks_v2_1_0
lmb_v10_v3_0=$RDI_DATADIR/xsim/ip/lmb_v10_v3_0
axis_protocol_checker_v2_0_12=$RDI_DATADIR/xsim/ip/axis_protocol_checker_v2_0_12
v_vscaler_v1_1_7=$RDI_DATADIR/xsim/ip/v_vscaler_v1_1_7
axi_timer_v2_0_30=$RDI_DATADIR/xsim/ip/axi_timer_v2_0_30
axi_remapper_rx_v1_0_0=$RDI_DATADIR/xsim/ip/axi_remapper_rx_v1_0_0
axi_gpio_v2_0_30=$RDI_DATADIR/xsim/ip/axi_gpio_v2_0_30
v_dual_splitter_v1_0_9=$RDI_DATADIR/xsim/ip/v_dual_splitter_v1_0_9
cmpy_v6_0_21=$RDI_DATADIR/xsim/ip/cmpy_v6_0_21
axi_interconnect_v1_7_21=$RDI_DATADIR/xsim/ip/axi_interconnect_v1_7_21
hdcp22_cipher_dp_v1_0_0=$RDI_DATADIR/xsim/ip/hdcp22_cipher_dp_v1_0_0
canfd_v3_0_7=$RDI_DATADIR/xsim/ip/canfd_v3_0_7
xtlm_ipc_v1_0=$RDI_DATADIR/xsim/ip/xtlm_ipc_v1_0
dfx_controller_v1_0_4=$RDI_DATADIR/xsim/ip/dfx_controller_v1_0_4
gmii_to_rgmii_v4_1_8=$RDI_DATADIR/xsim/ip/gmii_to_rgmii_v4_1_8
axi_intc_v4_1=$RDI_DATADIR/xsim/ip/axi_intc_v4_1
sim_rst_gen_v1_0_2=$RDI_DATADIR/xsim/ip/sim_rst_gen_v1_0_2
func_emu_util_v1_0=$RDI_DATADIR/xsim/ip/func_emu_util_v1_0
xilinx_vip=$RDI_DATADIR/xsim/ip/xilinx_vip
ptp_1588_timer_syncer_v1_0_2=$RDI_DATADIR/xsim/ip/ptp_1588_timer_syncer_v1_0_2
axi_dma_v7_1_29=$RDI_DATADIR/xsim/ip/axi_dma_v7_1_29
bscan_axi_v1_0_0=$RDI_DATADIR/xsim/ip/bscan_axi_v1_0_0
nvme_tc_v3_0_3=$RDI_DATADIR/xsim/ip/nvme_tc_v3_0_3
ieee802d3_clause74_fec_v1_0_16=$RDI_DATADIR/xsim/ip/ieee802d3_clause74_fec_v1_0_16
hbm2e_pl_v1_0_0=$RDI_DATADIR/xsim/ip/hbm2e_pl_v1_0_0
mammoth_transcode_v1_0_0=$RDI_DATADIR/xsim/ip/mammoth_transcode_v1_0_0
noc_hbm_v1_0_0=$RDI_DATADIR/xsim/ip/noc_hbm_v1_0_0
axi_tlm_ext_v1_0=$RDI_DATADIR/xsim/ip/axi_tlm_ext_v1_0
xbip_pipe_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_pipe_v3_0_6
v_tpg_v8_2_2=$RDI_DATADIR/xsim/ip/v_tpg_v8_2_2
sim_cpu_v1_0=$RDI_DATADIR/xsim/ip/sim_cpu_v1_0
roe_framer_v3_0_6=$RDI_DATADIR/xsim/ip/roe_framer_v3_0_6
axi_sg_v4_1_16=$RDI_DATADIR/xsim/ip/axi_sg_v4_1_16
util_idelay_ctrl_v1_0_2=$RDI_DATADIR/xsim/ip/util_idelay_ctrl_v1_0_2
qdriv_pl_v1_0_10=$RDI_DATADIR/xsim/ip/qdriv_pl_v1_0_10
g975_efec_i4_v1_0_19=$RDI_DATADIR/xsim/ip/g975_efec_i4_v1_0_19
qdriv_pl_phy_v1_0_0=$RDI_DATADIR/xsim/ip/qdriv_pl_phy_v1_0_0
c_addsub_v12_0_15=$RDI_DATADIR/xsim/ip/c_addsub_v12_0_15
gtwizard_ultrascale_v1_7_16=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_7_16
ddr4_pl_phy_v1_0_0=$RDI_DATADIR/xsim/ip/ddr4_pl_phy_v1_0_0
i2s_transmitter_v1_0_6=$RDI_DATADIR/xsim/ip/i2s_transmitter_v1_0_6
v_axi4s_remap_v1_0_21=$RDI_DATADIR/xsim/ip/v_axi4s_remap_v1_0_21
axi_datamover_v5_1_30=$RDI_DATADIR/xsim/ip/axi_datamover_v5_1_30
lib_srl_fifo_v1_0_2=$RDI_DATADIR/xsim/ip/lib_srl_fifo_v1_0_2
clk_vip_v1_0_2=$RDI_DATADIR/xsim/ip/clk_vip_v1_0_2
noc_ncrb_v1_0_0=$RDI_DATADIR/xsim/ip/noc_ncrb_v1_0_0
displayport_v9_0_6=$RDI_DATADIR/xsim/ip/displayport_v9_0_6
v_hscaler_v1_1_7=$RDI_DATADIR/xsim/ip/v_hscaler_v1_1_7
debug_tcp_server_v1=$RDI_DATADIR/xsim/ip/debug_tcp_server_v1
pc_cfr_v7_3_0=$RDI_DATADIR/xsim/ip/pc_cfr_v7_3_0
i2s_receiver_v1_0_6=$RDI_DATADIR/xsim/ip/i2s_receiver_v1_0_6
xdfe_cc_filter_v1_1_1=$RDI_DATADIR/xsim/ip/xdfe_cc_filter_v1_1_1
nvmeha_v1_0_9=$RDI_DATADIR/xsim/ip/nvmeha_v1_0_9
smartconnect_v1_0=$RDI_DATADIR/xsim/ip/smartconnect_v1_0
axi_pcie_v2_9_9=$RDI_DATADIR/xsim/ip/axi_pcie_v2_9_9
dds_compiler_v6_0_22=$RDI_DATADIR/xsim/ip/dds_compiler_v6_0_22
microblaze_mcs_v2_3_6=$RDI_DATADIR/xsim/ip/microblaze_mcs_v2_3_6
axis_dwidth_converter_v1_1_27=$RDI_DATADIR/xsim/ip/axis_dwidth_converter_v1_1_27
mult_gen_v12_0_18=$RDI_DATADIR/xsim/ip/mult_gen_v12_0_18
axis_ila_intf_v1_0_0=$RDI_DATADIR/xsim/ip/axis_ila_intf_v1_0_0
xfft_v9_1_9=$RDI_DATADIR/xsim/ip/xfft_v9_1_9
displayport_v8_1_6=$RDI_DATADIR/xsim/ip/displayport_v8_1_6
util_ff_v1_0_2=$RDI_DATADIR/xsim/ip/util_ff_v1_0_2
g709_rs_decoder_v2_2_11=$RDI_DATADIR/xsim/ip/g709_rs_decoder_v2_2_11
dprx_v1_0_1=$RDI_DATADIR/xsim/ip/dprx_v1_0_1
in_system_ibert_v1_0_19=$RDI_DATADIR/xsim/ip/in_system_ibert_v1_0_19
axi_tft_v2_0_26=$RDI_DATADIR/xsim/ip/axi_tft_v2_0_26
perf_axi_tg_v1_0_10=$RDI_DATADIR/xsim/ip/perf_axi_tg_v1_0_10
lib_bmg_v1_0_15=$RDI_DATADIR/xsim/ip/lib_bmg_v1_0_15
bs_mux_v1_0_0=$RDI_DATADIR/xsim/ip/bs_mux_v1_0_0
lib_cdc_v1_0_2=$RDI_DATADIR/xsim/ip/lib_cdc_v1_0_2
dbg_intf=$RDI_DATADIR/xsim/ip/dbg_intf
oran_radio_if_v3_0_0=$RDI_DATADIR/xsim/ip/oran_radio_if_v3_0_0
axi_vdma_v6_3_16=$RDI_DATADIR/xsim/ip/axi_vdma_v6_3_16
vid_edid_v1_0_0=$RDI_DATADIR/xsim/ip/vid_edid_v1_0_0
v_frmbuf_rd_v2_4_0=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_4_0
dft_v4_2_5=$RDI_DATADIR/xsim/ip/dft_v4_2_5
advanced_io_wizard_v1_0_9=$RDI_DATADIR/xsim/ip/advanced_io_wizard_v1_0_9
axi_register_slice_v2_1_28=$RDI_DATADIR/xsim/ip/axi_register_slice_v2_1_28
tmr_sem_v1_0_24=$RDI_DATADIR/xsim/ip/tmr_sem_v1_0_24
noc_nidb_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nidb_v1_0_0
noc_npp_rptr_v1_0_0=$RDI_DATADIR/xsim/ip/noc_npp_rptr_v1_0_0
axi_epu_v1_0_1=$RDI_DATADIR/xsim/ip/axi_epu_v1_0_1
noc_nsu_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nsu_v1_0_0
axis_data_fifo_v1_1_29=$RDI_DATADIR/xsim/ip/axis_data_fifo_v1_1_29
aurora_8b10b_versal_v1_0_1=$RDI_DATADIR/xsim/ip/aurora_8b10b_versal_v1_0_1
axi_vfifo_ctrl_v2_0_30=$RDI_DATADIR/xsim/ip/axi_vfifo_ctrl_v2_0_30
rs_toolbox_v9_0_10=$RDI_DATADIR/xsim/ip/rs_toolbox_v9_0_10
gtwizard_ultrascale_v1_6_14=$RDI_DATADIR/xsim/ip/gtwizard_ultrascale_v1_6_14
xdfe_cc_mixer_v2_0_1=$RDI_DATADIR/xsim/ip/xdfe_cc_mixer_v2_0_1
ten_gig_eth_pcs_pma_v6_0_25=$RDI_DATADIR/xsim/ip/ten_gig_eth_pcs_pma_v6_0_25
xbip_utils_v3_0_10=$RDI_DATADIR/xsim/ip/xbip_utils_v3_0_10
v_frmbuf_rd_v2_2_7=$RDI_DATADIR/xsim/ip/v_frmbuf_rd_v2_2_7
dptx_v1_0_1=$RDI_DATADIR/xsim/ip/dptx_v1_0_1
axis_ila_adv_trig_v1_0_0=$RDI_DATADIR/xsim/ip/axis_ila_adv_trig_v1_0_0
l_ethernet_v3_3_4=$RDI_DATADIR/xsim/ip/l_ethernet_v3_3_4
v_vcresampler_v1_1_7=$RDI_DATADIR/xsim/ip/v_vcresampler_v1_1_7
xdfe_common_v1_0_0=$RDI_DATADIR/xsim/ip/xdfe_common_v1_0_0
ethernet_1_10_25g_v2_7_9=$RDI_DATADIR/xsim/ip/ethernet_1_10_25g_v2_7_9
vid_phy_controller_v2_2_16=$RDI_DATADIR/xsim/ip/vid_phy_controller_v2_2_16
v_vid_gt_bridge_v2_0_3=$RDI_DATADIR/xsim/ip/v_vid_gt_bridge_v2_0_3
axi_bram_ctrl_v4_1_8=$RDI_DATADIR/xsim/ip/axi_bram_ctrl_v4_1_8
adc_dac_if_phy_v1_0_0=$RDI_DATADIR/xsim/ip/adc_dac_if_phy_v1_0_0
pl_fileio_v1_0_0=$RDI_DATADIR/xsim/ip/pl_fileio_v1_0_0
axi_msg_v1_0_9=$RDI_DATADIR/xsim/ip/axi_msg_v1_0_9
v_warp_filter_v1_0_2=$RDI_DATADIR/xsim/ip/v_warp_filter_v1_0_2
sim_clk_gen_v1_0_3=$RDI_DATADIR/xsim/ip/sim_clk_gen_v1_0_3
etrnic_v1_1_6=$RDI_DATADIR/xsim/ip/etrnic_v1_1_6
trace_s2mm_v2_0_0=$RDI_DATADIR/xsim/ip/trace_s2mm_v2_0_0
vitis_net_p4_v1_3_0=$RDI_DATADIR/xsim/ip/vitis_net_p4_v1_3_0
uram_rd_back_v1_0_2=$RDI_DATADIR/xsim/ip/uram_rd_back_v1_0_2
noc_nps6_v1_0_0=$RDI_DATADIR/xsim/ip/noc_nps6_v1_0_0
lmb_bram_if_cntlr_v4_0_22=$RDI_DATADIR/xsim/ip/lmb_bram_if_cntlr_v4_0_22
vfb_v1_0_22=$RDI_DATADIR/xsim/ip/vfb_v1_0_22
sim_ipc_multi_intf_v1_0=$RDI_DATADIR/xsim/ip/sim_ipc_multi_intf_v1_0
mipi_dphy_v4_3_6=$RDI_DATADIR/xsim/ip/mipi_dphy_v4_3_6
axi_dbg_hub=$RDI_DATADIR/xsim/ip/axi_dbg_hub
pcie_jtag_v1_0_0=$RDI_DATADIR/xsim/ip/pcie_jtag_v1_0_0
v_mix_v5_1_7=$RDI_DATADIR/xsim/ip/v_mix_v5_1_7
axis_register_slice_v1_1_28=$RDI_DATADIR/xsim/ip/axis_register_slice_v1_1_28
lib_fifo_v1_0_17=$RDI_DATADIR/xsim/ip/lib_fifo_v1_0_17
axi_protocol_converter_v2_1_28=$RDI_DATADIR/xsim/ip/axi_protocol_converter_v2_1_28
axis_broadcaster_v1_1_27=$RDI_DATADIR/xsim/ip/axis_broadcaster_v1_1_27
lte_fft_v2_1_7=$RDI_DATADIR/xsim/ip/lte_fft_v2_1_7
axi_protocol_checker_v2_0_14=$RDI_DATADIR/xsim/ip/axi_protocol_checker_v2_0_14
x5io_wizard_phy_v1_0_0=$RDI_DATADIR/xsim/ip/x5io_wizard_phy_v1_0_0
vby1hs_v1_0_3=$RDI_DATADIR/xsim/ip/vby1hs_v1_0_3
axi_fifo_mm_s_v4_3_0=$RDI_DATADIR/xsim/ip/axi_fifo_mm_s_v4_3_0
tsn_temac_v1_0_7=$RDI_DATADIR/xsim/ip/tsn_temac_v1_0_7
viterbi_v9_1_14=$RDI_DATADIR/xsim/ip/viterbi_v9_1_14
jesd204c_v4_2_12=$RDI_DATADIR/xsim/ip/jesd204c_v4_2_12
g975_efec_i7_v2_0_20=$RDI_DATADIR/xsim/ip/g975_efec_i7_v2_0_20
v_frmbuf_wr_v2_2_7=$RDI_DATADIR/xsim/ip/v_frmbuf_wr_v2_2_7
c_compare_v12_0_6=$RDI_DATADIR/xsim/ip/c_compare_v12_0_6
axi_hbicap_v1_0_5=$RDI_DATADIR/xsim/ip/axi_hbicap_v1_0_5
v_axi4s_remap_v1_1_7=$RDI_DATADIR/xsim/ip/v_axi4s_remap_v1_1_7
cam_v2_5_0=$RDI_DATADIR/xsim/ip/cam_v2_5_0
axi_epc_v2_0_31=$RDI_DATADIR/xsim/ip/axi_epc_v2_0_31
v_hdmi_phy1_v1_0_9=$RDI_DATADIR/xsim/ip/v_hdmi_phy1_v1_0_9
v_vid_gt_bridge_v1_0_9=$RDI_DATADIR/xsim/ip/v_vid_gt_bridge_v1_0_9
axi_c2c_v1_0_7=$RDI_DATADIR/xsim/ip/axi_c2c_v1_0_7
axi_memory_init_v1_0_9=$RDI_DATADIR/xsim/ip/axi_memory_init_v1_0_9
processing_system7_v5_5_6=$RDI_DATADIR/xsim/ip/processing_system7_v5_5_6
axis_ila_pp_v1_0_0=$RDI_DATADIR/xsim/ip/axis_ila_pp_v1_0_0
ai_pl_trig=$RDI_DATADIR/xsim/ip/ai_pl_trig
axi_bram_ctrl_v4_0_14=$RDI_DATADIR/xsim/ip/axi_bram_ctrl_v4_0_14
proc_sys_reset_v5_0_13=$RDI_DATADIR/xsim/ip/proc_sys_reset_v5_0_13
xtlm_ap_ctrl_v1_0=$RDI_DATADIR/xsim/ip/xtlm_ap_ctrl_v1_0
fifo_generator_v13_2_8=$RDI_DATADIR/xsim/ip/fifo_generator_v13_2_8
msm_cpp=$RDI_DATADIR/xsim/ip/msm_cpp
v_frmbuf_wr_v2_3_3=$RDI_DATADIR/xsim/ip/v_frmbuf_wr_v2_3_3
interrupt_control_v3_1_4=$RDI_DATADIR/xsim/ip/interrupt_control_v3_1_4
tcc_decoder_3gpplte_v3_0_6=$RDI_DATADIR/xsim/ip/tcc_decoder_3gpplte_v3_0_6
v_warp_filter_v1_1_1=$RDI_DATADIR/xsim/ip/v_warp_filter_v1_1_1
axi_vip_v1_1_14=$RDI_DATADIR/xsim/ip/axi_vip_v1_1_14
axis_ila_txns_cntr_v1_0_0=$RDI_DATADIR/xsim/ip/axis_ila_txns_cntr_v1_0_0
axi_ahblite_bridge_v3_0_25=$RDI_DATADIR/xsim/ip/axi_ahblite_bridge_v3_0_25
axi_lmb_bridge_v1_0_1=$RDI_DATADIR/xsim/ip/axi_lmb_bridge_v1_0_1
can_v5_1_0=$RDI_DATADIR/xsim/ip/can_v5_1_0
mdm_v3_2=$RDI_DATADIR/xsim/ip/mdm_v3_2
axi_lite_ipif_v3_0_4=$RDI_DATADIR/xsim/ip/axi_lite_ipif_v3_0_4
dp_videoaxi4s_bridge_v1_0_1=$RDI_DATADIR/xsim/ip/dp_videoaxi4s_bridge_v1_0_1
picxo_fracxo_v2_0_0=$RDI_DATADIR/xsim/ip/picxo_fracxo_v2_0_0
axis_itct_v1_0_0=$RDI_DATADIR/xsim/ip/axis_itct_v1_0_0
tcc_decoder_3gppmm_v2_0_24=$RDI_DATADIR/xsim/ip/tcc_decoder_3gppmm_v2_0_24
gig_ethernet_pcs_pma_v16_2_12=$RDI_DATADIR/xsim/ip/gig_ethernet_pcs_pma_v16_2_12
xbip_accum_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_accum_v3_0_6
axis_interconnect_v1_1_21=$RDI_DATADIR/xsim/ip/axis_interconnect_v1_1_21
g709_fec_v2_4_7=$RDI_DATADIR/xsim/ip/g709_fec_v2_4_7
hdcp_v1_0_3=$RDI_DATADIR/xsim/ip/hdcp_v1_0_3
advanced_io_wizard_phy_v1_0_0=$RDI_DATADIR/xsim/ip/advanced_io_wizard_phy_v1_0_0
tcc_encoder_3gpplte_v4_0_16=$RDI_DATADIR/xsim/ip/tcc_encoder_3gpplte_v4_0_16
mrmac_v2_1_0=$RDI_DATADIR/xsim/ip/mrmac_v2_1_0
pr_decoupler_v1_0_10=$RDI_DATADIR/xsim/ip/pr_decoupler_v1_0_10
hsdp_trace_v2_0_0=$RDI_DATADIR/xsim/ip/hsdp_trace_v2_0_0
xbip_dsp48_acc_v3_0_6=$RDI_DATADIR/xsim/ip/xbip_dsp48_acc_v3_0_6
axi4stream_vip_v1_1_14=$RDI_DATADIR/xsim/ip/axi4stream_vip_v1_1_14
ai_noc=$RDI_DATADIR/xsim/ip/ai_noc
axi_timebase_wdt_v3_0_20=$RDI_DATADIR/xsim/ip/axi_timebase_wdt_v3_0_20
msm_adapters=$RDI_DATADIR/xsim/ip/msm_adapters
accelerator_monitor_v1_1_0=$RDI_DATADIR/xsim/ip/accelerator_monitor_v1_1_0
axi_usb2_device_v5_0_29=$RDI_DATADIR/xsim/ip/axi_usb2_device_v5_0_29
ieee802d3_50g_rs_fec_v1_0_22=$RDI_DATADIR/xsim/ip/ieee802d3_50g_rs_fec_v1_0_22
ieee802d3_200g_rs_fec_v2_0_9=$RDI_DATADIR/xsim/ip/ieee802d3_200g_rs_fec_v2_0_9
cordic_v6_0_19=$RDI_DATADIR/xsim/ip/cordic_v6_0_19
v_smpte_sdi_v3_0_9=$RDI_DATADIR/xsim/ip/v_smpte_sdi_v3_0_9
anlt_subcore_ip_v1_0_0=$RDI_DATADIR/xsim/ip/anlt_subcore_ip_v1_0_0
shell_utils_addr_remap_v1_0_7=$RDI_DATADIR/xsim/ip/shell_utils_addr_remap_v1_0_7
axi_hwicap_v3_0_32=$RDI_DATADIR/xsim/ip/axi_hwicap_v3_0_32
axis_dbg_sync_v1_0_0=$RDI_DATADIR/xsim/ip/axis_dbg_sync_v1_0_0
noc_sc_v2_0_0=$RDI_DATADIR/xsim/ip/noc_sc_v2_0_0
compact_gt_v1_0_15=$RDI_DATADIR/xsim/ip/compact_gt_v1_0_15
axis_dwidth_converter_sc_v1_1=$RDI_DATADIR/xsim/ip/axis_dwidth_converter_sc_v1_1
v_uhdsdi_vidgen_v1_0_1=$RDI_DATADIR/xsim/ip/v_uhdsdi_vidgen_v1_0_1
ddr4_pl_v1_0_11=$RDI_DATADIR/xsim/ip/ddr4_pl_v1_0_11
videoaxi4s_bridge_v1_0_5=$RDI_DATADIR/xsim/ip/videoaxi4s_bridge_v1_0_5
axi_quad_spi_v3_2_27=$RDI_DATADIR/xsim/ip/axi_quad_spi_v3_2_27
ilknf_v1_3_0=$RDI_DATADIR/xsim/ip/ilknf_v1_3_0
sim_xdma_cpp_v1=$RDI_DATADIR/xsim/ip/sim_xdma_cpp_v1
hsdp_trace_v1_0_0=$RDI_DATADIR/xsim/ip/hsdp_trace_v1_0_0
mailbox_v2_1_15=$RDI_DATADIR/xsim/ip/mailbox_v2_1_15
trace_hub_v1_1_0=$RDI_DATADIR/xsim/ip/trace_hub_v1_1_0
bs_switch_v1_0_2=$RDI_DATADIR/xsim/ip/bs_switch_v1_0_2
dfx_axi_shutdown_manager_v1_0_0=$RDI_DATADIR/xsim/ip/dfx_axi_shutdown_manager_v1_0_0
emu_perf_common_v1_0=$RDI_DATADIR/xsim/ip/emu_perf_common_v1_0
tri_mode_ethernet_mac_v9_0_26=$RDI_DATADIR/xsim/ip/tri_mode_ethernet_mac_v9_0_26
v_tpg_v8_1_7=$RDI_DATADIR/xsim/ip/v_tpg_v8_1_7
axi_perf_mon_v5_0_30=$RDI_DATADIR/xsim/ip/axi_perf_mon_v5_0_30
axi_lite_ipif_v3_0=$RDI_DATADIR/xsim/ip/axi_lite_ipif_v3_0
v_hdmi_rx_v3_0_2=$RDI_DATADIR/xsim/ip/v_hdmi_rx_v3_0_2
processing_system7_vip_v1_0_16=$RDI_DATADIR/xsim/ip/processing_system7_vip_v1_0_16
v_smpte_uhdsdi_rx_v1_0_1=$RDI_DATADIR/xsim/ip/v_smpte_uhdsdi_rx_v1_0_1
axis_mem_v1_0_0=$RDI_DATADIR/xsim/ip/axis_mem_v1_0_0
can_v5_0_31=$RDI_DATADIR/xsim/ip/can_v5_0_31
sem_v4_1_13=$RDI_DATADIR/xsim/ip/sem_v4_1_13
c_reg_fd_v12_0_6=$RDI_DATADIR/xsim/ip/c_reg_fd_v12_0_6
microblaze_v9_5_4=$RDI_DATADIR/xsim/ip/microblaze_v9_5_4
ll_compress_v2_0_1=$RDI_DATADIR/xsim/ip/ll_compress_v2_0_1
usxgmii_v1_2_11=$RDI_DATADIR/xsim/ip/usxgmii_v1_2_11
polar_v1_0_11=$RDI_DATADIR/xsim/ip/polar_v1_0_11
xdfe_nr_prach_v2_0_0=$RDI_DATADIR/xsim/ip/xdfe_nr_prach_v2_0_0
axi_traffic_gen_v3_0_14=$RDI_DATADIR/xsim/ip/axi_traffic_gen_v3_0_14
ieee802d3_25g_rs_fec_v1_0_27=$RDI_DATADIR/xsim/ip/ieee802d3_25g_rs_fec_v1_0_27
v_letterbox_v1_1_7=$RDI_DATADIR/xsim/ip/v_letterbox_v1_1_7
ldpc_v2_0_12=$RDI_DATADIR/xsim/ip/ldpc_v2_0_12
xlconcat_v2_1_4=$RDI_DATADIR/xsim/ip/xlconcat_v2_1_4
v_axi4s_vid_out_v4_0_16=$RDI_DATADIR/xsim/ip/v_axi4s_vid_out_v4_0_16
fifo_generator_v13_0_6=$RDI_DATADIR/xsim/ip/fifo_generator_v13_0_6
v_dp_axi4s_vid_out_v1_0_6=$RDI_DATADIR/xsim/ip/v_dp_axi4s_vid_out_v1_0_6
mipi_csi2_rx_ctrl_v1_0_8=$RDI_DATADIR/xsim/ip/mipi_csi2_rx_ctrl_v1_0_8
lut_buffer_v2_0_0=$RDI_DATADIR/xsim/ip/lut_buffer_v2_0_0
axi_cdma_v4_1_28=$RDI_DATADIR/xsim/ip/axi_cdma_v4_1_28
amm_axi_bridge_v1_0_14=$RDI_DATADIR/xsim/ip/amm_axi_bridge_v1_0_14
axi_chip2chip_v5_0_19=$RDI_DATADIR/xsim/ip/axi_chip2chip_v5_0_19
xbip_dsp48_wrapper_v3_0_4=$RDI_DATADIR/xsim/ip/xbip_dsp48_wrapper_v3_0_4
axi_intc_v4_1_17=$RDI_DATADIR/xsim/ip/axi_intc_v4_1_17
mem_pl_v1_0_0=$RDI_DATADIR/xsim/ip/mem_pl_v1_0_0
cic_compiler_v4_0_16=$RDI_DATADIR/xsim/ip/cic_compiler_v4_0_16
rld3_pl_v1_0_12=$RDI_DATADIR/xsim/ip/rld3_pl_v1_0_12
jesd204_v7_2_18=$RDI_DATADIR/xsim/ip/jesd204_v7_2_18
v_hdmi_rx1_v1_0_5=$RDI_DATADIR/xsim/ip/v_hdmi_rx1_v1_0_5
ta_dma_v1_0_12=$RDI_DATADIR/xsim/ip/ta_dma_v1_0_12
dsp_macro_v1_0_3=$RDI_DATADIR/xsim/ip/dsp_macro_v1_0_3
uhdsdi_gt_v2_0_11=$RDI_DATADIR/xsim/ip/uhdsdi_gt_v2_0_11
v_csc_v1_1_7=$RDI_DATADIR/xsim/ip/v_csc_v1_1_7
mem_tg_v1_0_10=$RDI_DATADIR/xsim/ip/mem_tg_v1_0_10
v_tc_v6_1_13=$RDI_DATADIR/xsim/ip/v_tc_v6_1_13
stm_v1_0_0=$RDI_DATADIR/xsim/ip/stm_v1_0_0
axis_subset_converter_v1_1_28=$RDI_DATADIR/xsim/ip/axis_subset_converter_v1_1_28
pc_cfr_v7_0_1=$RDI_DATADIR/xsim/ip/pc_cfr_v7_0_1
timer_sync_1588_v1_2_4=$RDI_DATADIR/xsim/ip/timer_sync_1588_v1_2_4
axi_pcie3_v3_0_26=$RDI_DATADIR/xsim/ip/axi_pcie3_v3_0_26
aie_ps_v1_0=$RDI_DATADIR/xsim/ip/aie_ps_v1_0
axi_stream_monitor_v1_1_0=$RDI_DATADIR/xsim/ip/axi_stream_monitor_v1_1_0
xdfe_resampler_v1_0_6=$RDI_DATADIR/xsim/ip/xdfe_resampler_v1_0_6
mipi_csi2_tx_ctrl_v1_0_4=$RDI_DATADIR/xsim/ip/mipi_csi2_tx_ctrl_v1_0_4
shell_utils_msp432_bsl_crc_gen_v1_0_0=$RDI_DATADIR/xsim/ip/shell_utils_msp432_bsl_crc_gen_v1_0_0
ecc_v2_0_14=$RDI_DATADIR/xsim/ip/ecc_v2_0_14
axis_accelerator_adapter_v2_1_16=$RDI_DATADIR/xsim/ip/axis_accelerator_adapter_v2_1_16
axis_ila_ct_v1_0_0=$RDI_DATADIR/xsim/ip/axis_ila_ct_v1_0_0
audio_formatter_v1_0_10=$RDI_DATADIR/xsim/ip/audio_formatter_v1_0_10
x5io_wizard_v1_0_1=$RDI_DATADIR/xsim/ip/x5io_wizard_v1_0_1
lmb_bram_if_cntlr_v4_0=$RDI_DATADIR/xsim/ip/lmb_bram_if_cntlr_v4_0
cmac_usplus_v3_1_13=$RDI_DATADIR/xsim/ip/cmac_usplus_v3_1_13
sim_qdma_sc_v1_0=$RDI_DATADIR/xsim/ip/sim_qdma_sc_v1_0
video_frame_crc_v1_0_4=$RDI_DATADIR/xsim/ip/video_frame_crc_v1_0_4
fit_timer_v2_0_10=$RDI_DATADIR/xsim/ip/fit_timer_v2_0_10
axi_master_burst_v2_0_7=$RDI_DATADIR/xsim/ip/axi_master_burst_v2_0_7
rld3_pl_phy_v1_0_0=$RDI_DATADIR/xsim/ip/rld3_pl_phy_v1_0_0
xtlm_simple_interconnect_v1_0=$RDI_DATADIR/xsim/ip/xtlm_simple_interconnect_v1_0
axi_pmon_v1_0_0=$RDI_DATADIR/xsim/ip/axi_pmon_v1_0_0
xfft_v7_2_14=$RDI_DATADIR/xsim/ip/xfft_v7_2_14
av_pat_gen_v1_0_1=$RDI_DATADIR/xsim/ip/av_pat_gen_v1_0_1
polar_v1_1_1=$RDI_DATADIR/xsim/ip/polar_v1_1_1
zynq_ultra_ps_e_v3_3_9=$RDI_DATADIR/xsim/ip/zynq_ultra_ps_e_v3_3_9
axi_ethernet_buffer_v2_0_24=$RDI_DATADIR/xsim/ip/axi_ethernet_buffer_v2_0_24
v_vid_in_axi4s_v5_0_2=$RDI_DATADIR/xsim/ip/v_vid_in_axi4s_v5_0_2
dcmac_v2_2_0=$RDI_DATADIR/xsim/ip/dcmac_v2_2_0
fir_compiler_v5_2_6=$RDI_DATADIR/xsim/ip/fir_compiler_v5_2_6