Files
2024-10-28 13:14:49 +08:00

1.1 KiB

Summary

Date : 2024-03-26 15:29:43

Directory d:\projects\vivadoPrj\c64_pro\c64_pro.srcs\sources_1\rtl

Total : 55 files, 8710 codes, 1239 comments, 1945 blanks, all 11894 lines

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Languages

language files code comment blank total
Verilog 54 8,403 1,104 1,896 11,403
VHDL 1 307 135 49 491

Directories

path files code comment blank total
. 55 8,710 1,239 1,945 11,894
. (Files) 5 1,281 185 293 1,759
accel 2 314 23 67 404
eeg 10 1,567 223 325 2,115
emg 2 125 31 42 198
rhs2116 21 3,833 581 878 5,292
switch 4 413 69 89 571
trigger 3 203 31 55 289
upload 3 491 41 101 633
utils 5 483 55 95 633

Summary / Details / Diff Summary / Diff Details