`timescale 1 ns / 1 ps

module upload_top#
	(
		parameter						CLK_PERIOD		= 10	,
		parameter						CHANNLE_QTY		= 64	,
		parameter						PRE_MSG_LEN		= 128
	)
	(
		input							clk						,
		input							rst_n					,
		
		input		[13-1:0]			bram_addr				,
		input							bram_clk				,
		input		[32-1:0]			bram_din				,
		output		[32-1:0]			bram_dout				,
		input							bram_en					,
		input							bram_rst				,
		input		[ 4-1:0]			bram_we					,

		output							interrupt				,
		
		input		[32-1:0]			s_axis_trigger_tdata	,
		input							s_axis_trigger_tvalid	,
		output							s_axis_trigger_tready	,

		input		[32-1:0]			s_axis_eeg16_tdata		,
		input							s_axis_eeg16_tlast		,
		output							s_axis_eeg16_tready		,
		input							s_axis_eeg16_tvalid		,

		input		[32-1:0]			s_axis_eeg24_tdata		,
		input							s_axis_eeg24_tlast		,
		output							s_axis_eeg24_tready		,
		input							s_axis_eeg24_tvalid		,

		input		[32-1:0]			s_axis_emg_tdata		,
		input							s_axis_emg_tlast		,
		output							s_axis_emg_tready		,
		input							s_axis_emg_tvalid		,

		input		[48-1:0]			accel_data				,
		
		input							m_axis_record_tfull		,
		output		[ 8-1:0]			m_axis_record_tdata		,
		output		[ 1-1:0]			m_axis_record_tkeep		,
		output							m_axis_record_tlast		,
		input							m_axis_record_tready	,
		output							m_axis_record_tvalid	,

		output		[ 4-1:0]			debug_sig
	);
	
	//*****************************************************************************
	// localparam definition
	//*****************************************************************************
	
	
	//*****************************************************************************
	// Internal register and wire declarations
	//*****************************************************************************
	wire							pulse_ms					;
	wire	[64-1:0]				run_time_ms					;

	wire							eeg_sel						;
	wire							protocol_sel				;
	wire							reset_package_id			;
	wire	[32-1:0]				overtime_ms					;
	wire	[ 8*PRE_MSG_LEN-1:0]	pre_message_array			;
	wire	[ 8-1:0]				pre_message_length			;
	wire	[ 8*CHANNLE_QTY-1:0]	ch_mapping2pc_array			;
	wire	[   CHANNLE_QTY-1:0]	upload_ch_array				;
	wire	[32-1:0]				upload_round_qty_set		;

	wire	[32-1:0]				s_axis_trig_ql_tdata		;
	wire							s_axis_trig_ql_tvalid		;
	wire							s_axis_trig_ql_tready		;

	wire	[32-1:0]				s_axis_trig_intan_tdata		;
	wire							s_axis_trig_intan_tvalid	;
	wire							s_axis_trig_intan_tready	;

	wire	[ 8-1:0]				m_axis_eeg_tdata			;
	wire							m_axis_eeg_tlast			;
	wire							m_axis_eeg_tready			;
	wire							m_axis_eeg_tvalid			;

	wire							m_axis_eeg_ql_tready		;
	wire							m_axis_eeg_intan_tready		;

	wire							m_axis_ql_tfull				;
	wire		[ 8-1:0]			m_axis_ql_tdata				;
	wire		[ 1-1:0]			m_axis_ql_tkeep				;
	wire							m_axis_ql_tlast				;
	wire							m_axis_ql_tready			;
	wire							m_axis_ql_tvalid			;

	wire							m_axis_intan_tfull			;
	wire		[ 8-1:0]			m_axis_intan_tdata			;
	wire		[ 1-1:0]			m_axis_intan_tkeep			;
	wire							m_axis_intan_tlast			;
	wire							m_axis_intan_tready			;
	wire							m_axis_intan_tvalid			;

	wire	[ 4-1:0]				debug_sig_sort				;
	
	genvar	i;

	//*****************************************************************************
	// Instantiation
	//*****************************************************************************
	run_time#
		(
			.CLK_PERIOD				( CLK_PERIOD			)
		)
	u_run_time
		(
			.clk					( clk					),
			.rst_n					( rst_n					),

			.pulse_ms				( pulse_ms				),
			.run_time_ms			( run_time_ms			)
		);

	upload_config# 
		(
			.CHANNLE_QTY			( CHANNLE_QTY			),
			.PRE_MSG_LEN			( PRE_MSG_LEN			)
		)
	u_upload_config
		(
			.clk					( clk					),
			.rst_n					( rst_n					),
			
			.bram_addr				( bram_addr				),
			.bram_clk				( bram_clk				),
			.bram_din				( bram_din				),
			.bram_dout				( bram_dout				),
			.bram_en				( bram_en				),
			.bram_rst				( bram_rst				),
			.bram_we				( bram_we				),
			
			.eeg_sel				( eeg_sel				),
			.protocol_sel			( protocol_sel			),

			.pre_message_array		( pre_message_array		),
			.pre_message_length		( pre_message_length	),
			.upload_round_qty_set	( upload_round_qty_set	),
			.ch_mapping2pc_array	( ch_mapping2pc_array	),
			.upload_ch_array		( upload_ch_array		),
			.reset_package_id		( reset_package_id		),
			.package_overtime_ms	( overtime_ms			)
		);

	upload_sort#
		(
			.CLK_PERIOD				( CLK_PERIOD			),
			.CHANNLE_QTY			( CHANNLE_QTY			)
		)
	u_upload_sort
		(
			.clk					( clk					),
			.rst_n					( rst_n					),

			.eeg_sel				( eeg_sel				),
			.protocol_sel			( protocol_sel			),
			.ch_mapping2pc_array	( ch_mapping2pc_array	),
			.upload_ch_array		( upload_ch_array		),

			//------------------------------------------ PL logic
			.s_axis_eeg16_tdata		( s_axis_eeg16_tdata	),
			.s_axis_eeg16_tlast		( s_axis_eeg16_tlast	),
			.s_axis_eeg16_tready	( s_axis_eeg16_tready	),
			.s_axis_eeg16_tvalid	( s_axis_eeg16_tvalid	),
			
			.s_axis_emg_tdata		( s_axis_emg_tdata	),
			.s_axis_emg_tlast		( s_axis_emg_tlast	),
			.s_axis_emg_tready	    ( s_axis_emg_tready	),
			.s_axis_emg_tvalid	    ( s_axis_emg_tvalid	),			

			.s_axis_eeg24_tdata		( s_axis_eeg24_tdata	),
			.s_axis_eeg24_tlast		( s_axis_eeg24_tlast	),
			.s_axis_eeg24_tready	( s_axis_eeg24_tready	),
			.s_axis_eeg24_tvalid	( s_axis_eeg24_tvalid	),

			//------------------------------------------ PC logic
			.m_axis_eeg_tdata		( m_axis_eeg_tdata		),
			.m_axis_eeg_tlast		( m_axis_eeg_tlast		),
			.m_axis_eeg_tready		( m_axis_eeg_tready		),
			.m_axis_eeg_tvalid		( m_axis_eeg_tvalid		),

			.debug_sig_sort			( debug_sig_sort		)
		);

	upload_protocol_ql#
		(
			.CLK_PERIOD				( CLK_PERIOD			),
			.PRE_MSG_LEN			( PRE_MSG_LEN			)
		)
	u_upload_protocol_ql
		(
			.clk					( clk					),
			.rst_n					( rst_n					),

			.enable					( protocol_sel			),
			.pulse_ms				( pulse_ms				),
			.run_time_ms			( run_time_ms			),

			.pre_message_array		( pre_message_array		),
			.pre_message_length		( pre_message_length	),
			.upload_round_qty_set	( upload_round_qty_set	),
			.reset_package_id		( reset_package_id		),
			.package_overtime_ms	( overtime_ms			),
			
			.s_axis_trigger_tdata	( s_axis_trig_ql_tdata	),
			.s_axis_trigger_tvalid	( s_axis_trig_ql_tvalid	),
			.s_axis_trigger_tready	( s_axis_trig_ql_tready	),

			.s_axis_eeg_tdata		( m_axis_eeg_tdata		),
			.s_axis_eeg_tlast		( m_axis_eeg_tlast		),
			.s_axis_eeg_tready		( m_axis_eeg_ql_tready	),
			.s_axis_eeg_tvalid		( m_axis_eeg_tvalid		),

			.accel_data				( accel_data			),

			.m_axis_record_tfull	( m_axis_ql_tfull		),
			.m_axis_record_tdata	( m_axis_ql_tdata		),
			.m_axis_record_tkeep	( m_axis_ql_tkeep		),
			.m_axis_record_tlast	( m_axis_ql_tlast		),
			.m_axis_record_tready	( m_axis_ql_tready		),
			.m_axis_record_tvalid	( m_axis_ql_tvalid		)
		);

	upload_protocol_intan#
		(
			.CLK_PERIOD				( CLK_PERIOD			)
		)
	u_upload_protocol_intan
		(
			.clk					( clk					),
			.rst_n					( rst_n					),

			.enable					( !protocol_sel			),
			.interrupt				( 						),
			.pulse_ms				( pulse_ms				),

			.upload_round_qty_set	( upload_round_qty_set	),
			.reset_package_id		( reset_package_id		),
			.package_overtime_ms	( overtime_ms			),
			
			.s_axis_trigger_tdata	( s_axis_trig_intan_tdata	),
			.s_axis_trigger_tvalid	( s_axis_trig_intan_tvalid	),
			.s_axis_trigger_tready	( s_axis_trig_intan_tready	),

			.s_axis_eeg_tdata		( m_axis_eeg_tdata		),
			.s_axis_eeg_tlast		( m_axis_eeg_tlast		),
			.s_axis_eeg_tready		( m_axis_eeg_intan_tready),
			.s_axis_eeg_tvalid		( m_axis_eeg_tvalid		),

			.m_axis_record_tfull	( m_axis_intan_tfull	),
			.m_axis_record_tdata	( m_axis_intan_tdata	),
			.m_axis_record_tkeep	( m_axis_intan_tkeep	),
			.m_axis_record_tlast	( m_axis_intan_tlast	),
			.m_axis_record_tready	( m_axis_intan_tready	),
			.m_axis_record_tvalid	( m_axis_intan_tvalid	)
		);
	
	//*****************************************************************************
	// Wire assignment
	//*****************************************************************************
	assign s_axis_trig_ql_tdata		= s_axis_trigger_tdata;
	assign s_axis_trig_ql_tvalid	= s_axis_trigger_tvalid;
	assign s_axis_trig_intan_tdata	= s_axis_trigger_tdata;
	assign s_axis_trig_intan_tvalid	= s_axis_trigger_tvalid;
	assign s_axis_trigger_tready	= s_axis_trig_ql_tready || s_axis_trig_intan_tready;

	assign m_axis_eeg_tready = m_axis_eeg_ql_tready || m_axis_eeg_intan_tready;

	assign m_axis_record_tdata	= (protocol_sel)? m_axis_ql_tdata : m_axis_intan_tdata;
	assign m_axis_record_tkeep	= (protocol_sel)? m_axis_ql_tkeep : m_axis_intan_tkeep;
	assign m_axis_record_tlast	= (protocol_sel)? m_axis_ql_tlast : m_axis_intan_tlast;
	assign m_axis_record_tvalid	= (protocol_sel)? m_axis_ql_tvalid: m_axis_intan_tvalid;
	assign m_axis_ql_tfull		= m_axis_record_tfull;
	assign m_axis_intan_tfull	= m_axis_record_tfull;
	assign m_axis_ql_tready		= m_axis_record_tready;
	assign m_axis_intan_tready	= m_axis_record_tready;
			

endmodule