Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved. -------------------------------------------------------------------------------------------------------------------------------------------------------------------- | Tool Version : Vivado v.2023.1 (win64) Build 3865809 Sun May 7 15:05:29 MDT 2023 | Date : Sun Aug 4 13:44:31 2024 | Host : 840-5CG14025H4 running 64-bit major release (build 9200) | Command : report_methodology -file c64pro_top_methodology_drc_routed.rpt -pb c64pro_top_methodology_drc_routed.pb -rpx c64pro_top_methodology_drc_routed.rpx | Design : c64pro_top | Device : xc7z010clg400-2 | Speed File : -2 | Design State : Fully Routed -------------------------------------------------------------------------------------------------------------------------------------------------------------------- Report Methodology Table of Contents ----------------- 1. REPORT SUMMARY 2. REPORT DETAILS 1. REPORT SUMMARY ----------------- Netlist: netlist Floorplan: design_1 Design limits: Max violations: Violations found: 202 +-----------+----------+-------------------------------------------+------------+ | Rule | Severity | Description | Violations | +-----------+----------+-------------------------------------------+------------+ | TIMING-18 | Warning | Missing input or output delay | 72 | | TIMING-20 | Warning | Non-clocked latch | 128 | | ULMTCS-2 | Warning | Control Sets use limits require reduction | 1 | | LATCH-1 | Advisory | Existing latches in the design | 1 | +-----------+----------+-------------------------------------------+------------+ 2. REPORT DETAILS ----------------- TIMING-18#1 Warning Missing input or output delay An input delay is missing on accel_int0 relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#2 Warning Missing input or output delay An input delay is missing on accel_int1 relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#3 Warning Missing input or output delay An input delay is missing on eeg_ads1299_drdy_n[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#4 Warning Missing input or output delay An input delay is missing on eeg_ads1299_drdy_n[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#5 Warning Missing input or output delay An input delay is missing on eeg_ads1299_drdy_n[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#6 Warning Missing input or output delay An input delay is missing on eeg_ads1299_drdy_n[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#7 Warning Missing input or output delay An input delay is missing on eeg_ads1299_spi_miso[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#8 Warning Missing input or output delay An input delay is missing on eeg_ads1299_spi_miso[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#9 Warning Missing input or output delay An input delay is missing on eeg_ads1299_spi_miso[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#10 Warning Missing input or output delay An input delay is missing on eeg_ads1299_spi_miso[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#11 Warning Missing input or output delay An input delay is missing on gauge_indicate relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#12 Warning Missing input or output delay An input delay is missing on gauge_scl relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#13 Warning Missing input or output delay An input delay is missing on gauge_sda relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#14 Warning Missing input or output delay An input delay is missing on rsh2116_spi_miso[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#15 Warning Missing input or output delay An input delay is missing on rsh2116_spi_miso[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#16 Warning Missing input or output delay An input delay is missing on rsh2116_spi_miso[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#17 Warning Missing input or output delay An input delay is missing on rsh2116_spi_miso[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#18 Warning Missing input or output delay An input delay is missing on trigger_i[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#19 Warning Missing input or output delay An input delay is missing on trigger_i[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#20 Warning Missing input or output delay An input delay is missing on trigger_i[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#21 Warning Missing input or output delay An input delay is missing on usb_power_check relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#22 Warning Missing input or output delay An input delay is missing on z_scl relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#23 Warning Missing input or output delay An input delay is missing on z_sda relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#24 Warning Missing input or output delay An output delay is missing on adg1414_spi_mosi relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#25 Warning Missing input or output delay An output delay is missing on adg1414_spi_sclk relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#26 Warning Missing input or output delay An output delay is missing on adg1414_spi_sync relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#27 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#28 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#29 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#30 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#31 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[4] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#32 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[5] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#33 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[6] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#34 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_cs[7] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#35 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_mosi[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#36 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_mosi[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#37 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_mosi[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#38 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_mosi[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#39 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_sclk[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#40 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_sclk[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#41 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_sclk[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#42 Warning Missing input or output delay An output delay is missing on eeg_ads1299_spi_sclk[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#43 Warning Missing input or output delay An output delay is missing on eeg_ads1299_start relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#44 Warning Missing input or output delay An output delay is missing on gauge_scl relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#45 Warning Missing input or output delay An output delay is missing on gauge_sda relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#46 Warning Missing input or output delay An output delay is missing on led_state relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#47 Warning Missing input or output delay An output delay is missing on led_stim relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#48 Warning Missing input or output delay An output delay is missing on led_wifi relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#49 Warning Missing input or output delay An output delay is missing on power_on_ads1299 relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#50 Warning Missing input or output delay An output delay is missing on power_on_rsh2116_a relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#51 Warning Missing input or output delay An output delay is missing on power_on_rsh2116_d relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#52 Warning Missing input or output delay An output delay is missing on power_on_z relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#53 Warning Missing input or output delay An output delay is missing on power_sw_z relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#54 Warning Missing input or output delay An output delay is missing on rsh2116_enable[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#55 Warning Missing input or output delay An output delay is missing on rsh2116_enable[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#56 Warning Missing input or output delay An output delay is missing on rsh2116_enable[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#57 Warning Missing input or output delay An output delay is missing on rsh2116_enable[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#58 Warning Missing input or output delay An output delay is missing on rsh2116_spi_cs[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#59 Warning Missing input or output delay An output delay is missing on rsh2116_spi_cs[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#60 Warning Missing input or output delay An output delay is missing on rsh2116_spi_cs[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#61 Warning Missing input or output delay An output delay is missing on rsh2116_spi_cs[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#62 Warning Missing input or output delay An output delay is missing on rsh2116_spi_mosi[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#63 Warning Missing input or output delay An output delay is missing on rsh2116_spi_mosi[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#64 Warning Missing input or output delay An output delay is missing on rsh2116_spi_mosi[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#65 Warning Missing input or output delay An output delay is missing on rsh2116_spi_mosi[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#66 Warning Missing input or output delay An output delay is missing on rsh2116_spi_sclk[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#67 Warning Missing input or output delay An output delay is missing on rsh2116_spi_sclk[1] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#68 Warning Missing input or output delay An output delay is missing on rsh2116_spi_sclk[2] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#69 Warning Missing input or output delay An output delay is missing on rsh2116_spi_sclk[3] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#70 Warning Missing input or output delay An output delay is missing on trigger_o[0] relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#71 Warning Missing input or output delay An output delay is missing on z_scl relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-18#72 Warning Missing input or output delay An output delay is missing on z_sda relative to the rising and/or falling clock edge(s) of clk_fpga_0. Related violations: TIMING-20#1 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[0] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[0]/G is not reached by a timing clock Related violations: TIMING-20#2 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[10] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[10]/G is not reached by a timing clock Related violations: TIMING-20#3 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[11] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[11]/G is not reached by a timing clock Related violations: TIMING-20#4 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[12] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[12]/G is not reached by a timing clock Related violations: TIMING-20#5 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[13] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[13]/G is not reached by a timing clock Related violations: TIMING-20#6 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[14] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[14]/G is not reached by a timing clock Related violations: TIMING-20#7 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[15] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[15]/G is not reached by a timing clock Related violations: TIMING-20#8 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[16] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[16]/G is not reached by a timing clock Related violations: TIMING-20#9 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[17] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[17]/G is not reached by a timing clock Related violations: TIMING-20#10 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[18] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[18]/G is not reached by a timing clock Related violations: TIMING-20#11 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[19] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[19]/G is not reached by a timing clock Related violations: TIMING-20#12 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[1] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[1]/G is not reached by a timing clock Related violations: TIMING-20#13 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[20] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[20]/G is not reached by a timing clock Related violations: TIMING-20#14 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[21] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[21]/G is not reached by a timing clock Related violations: TIMING-20#15 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[22] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[22]/G is not reached by a timing clock Related violations: TIMING-20#16 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[23] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[23]/G is not reached by a timing clock Related violations: TIMING-20#17 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[24] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[24]/G is not reached by a timing clock Related violations: TIMING-20#18 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[25] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[25]/G is not reached by a timing clock Related violations: TIMING-20#19 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[26] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[26]/G is not reached by a timing clock Related violations: TIMING-20#20 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[27] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[27]/G is not reached by a timing clock Related violations: TIMING-20#21 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[28] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[28]/G is not reached by a timing clock Related violations: TIMING-20#22 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[29] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[29]/G is not reached by a timing clock Related violations: TIMING-20#23 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[2] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[2]/G is not reached by a timing clock Related violations: TIMING-20#24 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[30] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[30]/G is not reached by a timing clock Related violations: TIMING-20#25 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[31] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[31]/G is not reached by a timing clock Related violations: TIMING-20#26 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[3] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[3]/G is not reached by a timing clock Related violations: TIMING-20#27 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[4] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[4]/G is not reached by a timing clock Related violations: TIMING-20#28 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[5] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[5]/G is not reached by a timing clock Related violations: TIMING-20#29 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[6] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[6]/G is not reached by a timing clock Related violations: TIMING-20#30 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[7] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[7]/G is not reached by a timing clock Related violations: TIMING-20#31 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[8] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[8]/G is not reached by a timing clock Related violations: TIMING-20#32 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[9] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[0].u_transmit_if/spi_din_r_reg[9]/G is not reached by a timing clock Related violations: TIMING-20#33 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[0] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[0]/G is not reached by a timing clock Related violations: TIMING-20#34 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[10] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[10]/G is not reached by a timing clock Related violations: TIMING-20#35 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[11] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[11]/G is not reached by a timing clock Related violations: TIMING-20#36 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[12] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[12]/G is not reached by a timing clock Related violations: TIMING-20#37 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[13] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[13]/G is not reached by a timing clock Related violations: TIMING-20#38 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[14] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[14]/G is not reached by a timing clock Related violations: TIMING-20#39 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[15] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[15]/G is not reached by a timing clock Related violations: TIMING-20#40 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[16] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[16]/G is not reached by a timing clock Related violations: TIMING-20#41 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[17] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[17]/G is not reached by a timing clock Related violations: TIMING-20#42 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[18] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[18]/G is not reached by a timing clock Related violations: TIMING-20#43 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[19] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[19]/G is not reached by a timing clock Related violations: TIMING-20#44 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[1] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[1]/G is not reached by a timing clock Related violations: TIMING-20#45 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[20] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[20]/G is not reached by a timing clock Related violations: TIMING-20#46 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[21] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[21]/G is not reached by a timing clock Related violations: TIMING-20#47 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[22] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[22]/G is not reached by a timing clock Related violations: TIMING-20#48 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[23] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[23]/G is not reached by a timing clock Related violations: TIMING-20#49 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[24] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[24]/G is not reached by a timing clock Related violations: TIMING-20#50 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[25] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[25]/G is not reached by a timing clock Related violations: TIMING-20#51 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[26] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[26]/G is not reached by a timing clock Related violations: TIMING-20#52 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[27] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[27]/G is not reached by a timing clock Related violations: TIMING-20#53 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[28] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[28]/G is not reached by a timing clock Related violations: TIMING-20#54 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[29] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[29]/G is not reached by a timing clock Related violations: TIMING-20#55 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[2] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[2]/G is not reached by a timing clock Related violations: TIMING-20#56 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[30] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[30]/G is not reached by a timing clock Related violations: TIMING-20#57 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[31] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[31]/G is not reached by a timing clock Related violations: TIMING-20#58 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[3] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[3]/G is not reached by a timing clock Related violations: TIMING-20#59 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[4] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[4]/G is not reached by a timing clock Related violations: TIMING-20#60 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[5] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[5]/G is not reached by a timing clock Related violations: TIMING-20#61 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[6] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[6]/G is not reached by a timing clock Related violations: TIMING-20#62 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[7] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[7]/G is not reached by a timing clock Related violations: TIMING-20#63 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[8] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[8]/G is not reached by a timing clock Related violations: TIMING-20#64 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[9] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[1].u_transmit_if/spi_din_r_reg[9]/G is not reached by a timing clock Related violations: TIMING-20#65 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[0] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[0]/G is not reached by a timing clock Related violations: TIMING-20#66 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[10] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[10]/G is not reached by a timing clock Related violations: TIMING-20#67 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[11] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[11]/G is not reached by a timing clock Related violations: TIMING-20#68 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[12] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[12]/G is not reached by a timing clock Related violations: TIMING-20#69 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[13] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[13]/G is not reached by a timing clock Related violations: TIMING-20#70 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[14] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[14]/G is not reached by a timing clock Related violations: TIMING-20#71 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[15] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[15]/G is not reached by a timing clock Related violations: TIMING-20#72 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[16] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[16]/G is not reached by a timing clock Related violations: TIMING-20#73 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[17] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[17]/G is not reached by a timing clock Related violations: TIMING-20#74 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[18] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[18]/G is not reached by a timing clock Related violations: TIMING-20#75 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[19] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[19]/G is not reached by a timing clock Related violations: TIMING-20#76 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[1] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[1]/G is not reached by a timing clock Related violations: TIMING-20#77 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[20] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[20]/G is not reached by a timing clock Related violations: TIMING-20#78 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[21] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[21]/G is not reached by a timing clock Related violations: TIMING-20#79 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[22] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[22]/G is not reached by a timing clock Related violations: TIMING-20#80 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[23] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[23]/G is not reached by a timing clock Related violations: TIMING-20#81 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[24] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[24]/G is not reached by a timing clock Related violations: TIMING-20#82 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[25] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[25]/G is not reached by a timing clock Related violations: TIMING-20#83 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[26] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[26]/G is not reached by a timing clock Related violations: TIMING-20#84 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[27] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[27]/G is not reached by a timing clock Related violations: TIMING-20#85 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[28] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[28]/G is not reached by a timing clock Related violations: TIMING-20#86 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[29] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[29]/G is not reached by a timing clock Related violations: TIMING-20#87 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[2] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[2]/G is not reached by a timing clock Related violations: TIMING-20#88 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[30] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[30]/G is not reached by a timing clock Related violations: TIMING-20#89 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[31] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[31]/G is not reached by a timing clock Related violations: TIMING-20#90 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[3] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[3]/G is not reached by a timing clock Related violations: TIMING-20#91 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[4] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[4]/G is not reached by a timing clock Related violations: TIMING-20#92 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[5] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[5]/G is not reached by a timing clock Related violations: TIMING-20#93 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[6] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[6]/G is not reached by a timing clock Related violations: TIMING-20#94 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[7] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[7]/G is not reached by a timing clock Related violations: TIMING-20#95 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[8] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[8]/G is not reached by a timing clock Related violations: TIMING-20#96 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[9] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[2].u_transmit_if/spi_din_r_reg[9]/G is not reached by a timing clock Related violations: TIMING-20#97 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[0] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[0]/G is not reached by a timing clock Related violations: TIMING-20#98 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[10] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[10]/G is not reached by a timing clock Related violations: TIMING-20#99 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[11] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[11]/G is not reached by a timing clock Related violations: TIMING-20#100 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[12] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[12]/G is not reached by a timing clock Related violations: TIMING-20#101 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[13] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[13]/G is not reached by a timing clock Related violations: TIMING-20#102 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[14] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[14]/G is not reached by a timing clock Related violations: TIMING-20#103 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[15] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[15]/G is not reached by a timing clock Related violations: TIMING-20#104 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[16] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[16]/G is not reached by a timing clock Related violations: TIMING-20#105 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[17] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[17]/G is not reached by a timing clock Related violations: TIMING-20#106 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[18] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[18]/G is not reached by a timing clock Related violations: TIMING-20#107 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[19] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[19]/G is not reached by a timing clock Related violations: TIMING-20#108 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[1] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[1]/G is not reached by a timing clock Related violations: TIMING-20#109 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[20] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[20]/G is not reached by a timing clock Related violations: TIMING-20#110 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[21] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[21]/G is not reached by a timing clock Related violations: TIMING-20#111 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[22] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[22]/G is not reached by a timing clock Related violations: TIMING-20#112 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[23] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[23]/G is not reached by a timing clock Related violations: TIMING-20#113 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[24] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[24]/G is not reached by a timing clock Related violations: TIMING-20#114 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[25] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[25]/G is not reached by a timing clock Related violations: TIMING-20#115 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[26] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[26]/G is not reached by a timing clock Related violations: TIMING-20#116 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[27] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[27]/G is not reached by a timing clock Related violations: TIMING-20#117 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[28] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[28]/G is not reached by a timing clock Related violations: TIMING-20#118 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[29] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[29]/G is not reached by a timing clock Related violations: TIMING-20#119 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[2] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[2]/G is not reached by a timing clock Related violations: TIMING-20#120 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[30] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[30]/G is not reached by a timing clock Related violations: TIMING-20#121 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[31] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[31]/G is not reached by a timing clock Related violations: TIMING-20#122 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[3] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[3]/G is not reached by a timing clock Related violations: TIMING-20#123 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[4] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[4]/G is not reached by a timing clock Related violations: TIMING-20#124 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[5] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[5]/G is not reached by a timing clock Related violations: TIMING-20#125 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[6] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[6]/G is not reached by a timing clock Related violations: TIMING-20#126 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[7] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[7]/G is not reached by a timing clock Related violations: TIMING-20#127 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[8] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[8]/G is not reached by a timing clock Related violations: TIMING-20#128 Warning Non-clocked latch The latch u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[9] cannot be properly analyzed as its control pin u_pl_top/u_rhs2116_top/trans_if[3].u_transmit_if/spi_din_r_reg[9]/G is not reached by a timing clock Related violations: ULMTCS-2#1 Warning Control Sets use limits require reduction This design uses 1031 control sets (vs. available limit of 4400, determined by 1 control set per CLB). This exceeds the control set use guideline of 15 percent. This is at a level where reduction is REQUIRED (see UG949). Use report_control_sets to get more details. Related violations: LATCH-1#1 Advisory Existing latches in the design There are 128 latches found in the design. Inferred latches are often the result of HDL coding mistakes, such as incomplete if or case statements. Related violations: