`timescale 1 ns / 1 ps

module pl_top#
	(
		parameter	VERSION 				= 32'h10000001	,		
		parameter	CLK_FREQ 				= 100			,
		parameter	CLK_PERIOD				= 10			,
		
		//-----------------------------------------	RHS2116
		parameter	RSH2116_QTY				= 2				,//4
		parameter	RHS2116_SPI_CLK_DIV		= 4				,
		parameter	RSH2116_SPI_PERIOD		= 1500			,
		
		//-----------------------------------------	ADS1299
		parameter	ADS1299_QTY				= 4				,//8
		parameter	ADS1299_CH				= 8				,
		parameter	ADS1299_SPI_CLK_DIV		= 4				,
		parameter	ADS1299_SPI_QTY			= 4				,
		parameter	ADS1299_SPI_SLAVE_QTY	= 2				,
		parameter	ADS1299_SPI_PERIOD		= 2000          ,
		
		parameter  EMG_CHIPSET_QTY         = 1             ,
		parameter  EMG_SPIS_QTY            = 1             ,
		parameter  EMG_SPI_SLAVE_QTY       = 1                 
	)
	(
		input						clk						,
		input						rst_n					,

		//---------------------------------------------	PS:
		input	[12:0]				bram_stim_addr			,
		input 						bram_stim_clk			,
		input 	[31:0]				bram_stim_din			,
		output 	[31:0]				bram_stim_dout			,
		input 						bram_stim_en			,
		input 						bram_stim_rst			,
        input   [ 3:0]              bram_stim_we			,

        input   [12:0]              bram_eeg_addr			,
        input                       bram_eeg_clk			,
        input   [31:0]              bram_eeg_din			,
        output  [31:0]              bram_eeg_dout			,
        input                       bram_eeg_en				,
        input                       bram_eeg_rst			,
        input   [ 3:0]              bram_eeg_we				,
        
        input   [12:0]              bram_cur_addr			,  
        input                       bram_cur_clk			,  
        input   [31:0]              bram_cur_din			,  
        output  [31:0]              bram_cur_dout			,  
        input                       bram_cur_en			    ,  
        input                       bram_cur_rst			,  
        input   [ 3:0]              bram_cur_we			    , 

        input   [12:0]              bram_emg_addr			,
        input                       bram_emg_clk			,
        input   [31:0]              bram_emg_din			,
        output  [31:0]              bram_emg_dout			,
        input                       bram_emg_en				,
        input                       bram_emg_rst			,
        input   [ 3:0]              bram_emg_we				,

        input   [12:0]              bram_accel_addr			,
        input                       bram_accel_clk			,
        input   [31:0]              bram_accel_din			,
        output  [31:0]              bram_accel_dout			,
        input                       bram_accel_en			,
        input                       bram_accel_rst			,
        input   [ 3:0]              bram_accel_we			,

        input   [12:0]              bram_msg_addr			,
        input                       bram_msg_clk			,
        input   [31:0]              bram_msg_din			,
        output  [31:0]              bram_msg_dout			,
        input                       bram_msg_en				,
        input                       bram_msg_rst			,
        input   [ 3:0]              bram_msg_we				,
        
        input   [12:0]              bram_msg_emg_addr		,
        input                       bram_msg_emg_clk		,
        input   [31:0]              bram_msg_emg_din		,
        output  [31:0]              bram_msg_emg_dout		,
        input                       bram_msg_emg_en			,
        input                       bram_msg_emg_rst		,
        input   [ 3:0]              bram_msg_emg_we			,  

		input	[12:0]				bram_imp_addr			,
		input 						bram_imp_clk			,
		input 	[31:0]				bram_imp_din			,
		output 	[31:0]				bram_imp_dout			,
		input 						bram_imp_en		    	,
		input 						bram_imp_rst			,
        input   [ 3:0]              bram_imp_we		    	,        
	
		//---------------------------------------------	interrupt
		output                      stim_int				,
		output                      eeg_int					,
		output                      emg_int					,
		output                      accel_int				,
        
        input   [31:0]              m_axis_stim_tdata		,
        input                       m_axis_stim_tlast		,
        output                      m_axis_stim_tready		,
        input                       m_axis_stim_tvalid		,

        (*mark_debug="true"*)input                       m_axis_record_tfull		,
        (*mark_debug="true"*)output  [ 7:0]              m_axis_record_tdata		,
        (*mark_debug="true"*)output  [ 0:0]              m_axis_record_tkeep		,
        (*mark_debug="true"*)output                      m_axis_record_tlast		,
        (*mark_debug="true"*)input                       m_axis_record_tready	,
        (*mark_debug="true"*)output                      m_axis_record_tvalid	,
        
 	   (*mark_debug="true"*)output wire	[32-1:0]		 axis_emg_tdata         ,	//axis_eeg24_tdata	,
	   (*mark_debug="true"*)output wire					 axis_emg_tlast         ,	//axis_eeg24_tlast	,
	   (*mark_debug="true"*)output wire					 axis_emg_tready        ,	//axis_eeg24_tready	,
	   (*mark_debug="true"*)output wire					 axis_emg_tvalid        ,	//axis_eeg24_tvalid	,   
		
		//---------------------------------------------	RSH2116  没用
		output	[RSH2116_QTY-1:0]	rsh2116_enable			,
		output	[RSH2116_QTY-1:0]	rsh2116_spi_cs			,
		output	[RSH2116_QTY-1:0]	rsh2116_spi_sclk		,
		output	[RSH2116_QTY-1:0]	rsh2116_spi_mosi		,
		input	[RSH2116_QTY-1:0]	rsh2116_spi_miso		,

		//---------------------------------------------	ADS1299 for EEG
		output	[ADS1299_QTY-1:0]	eeg_ads1299_spi_cs		,
		output	[          2-1:0]	eeg_ads1299_spi_sclk	,
		output	[          2-1:0]	eeg_ads1299_spi_mosi	,
		input	[          2-1:0]	eeg_ads1299_spi_miso	,
		input	[          2-1:0]	eeg_ads1299_drdy_n		,
		output	[          2-1:0]   eeg_ads1299_start		,

		//---------------------------------------------	ADS1299 for EMG
		(*mark_debug="true"*)output						emg_ads1299_spi_cs		,
		(*mark_debug="true"*)output						emg_ads1299_spi_sclk	,
		(*mark_debug="true"*)output						emg_ads1299_spi_mosi	,
		(*mark_debug="true"*)input						emg_ads1299_spi_miso	,
		input						emg_ads1299_drdy_n		,
		output						emg_ads1299_start		,
		output						emg_ads1299_reset_n		,
		output						emg_ads1299_pwdn_n		,
		
		//---------------------------------------------	DAC80508
//        output     wire             dac1_cs_n              ,
//        output     wire             dac1_sclk              ,
//        output     wire             dac1_sdi               ,
//        output     wire             dac2_cs_n              ,
//        output     wire             dac2_sclk              ,
//        output     wire             dac2_sdi               ,   
        
		//------------------------------------------ device: MEMS
//		output						accel_spi_cs			,
//		output						accel_spi_sclk			,
//		output						accel_spi_mosi			,
//		input						accel_spi_miso			,
//		input						accel_int0				,
//		input						accel_int1				,

		//---------------------------------------------	ADG1414 for MCB,really ADGS5414
//		output						adg1414_spi_sync		,
//		output						adg1414_spi_sclk		,
//		output						adg1414_spi_mosi		,
//		input						adg1414_spi_miso		,
		
		//---------------------------------------------	ADG1414 for STIM,really ADGS5414
//		output						adg1414_spi_sync2		,
//		output						adg1414_spi_sclk2		,
//		output						adg1414_spi_mosi2		,
//		input						adg1414_spi_miso2		,	
		
		//---------------------------------------------	AD7689
		output	                	ad7689_cnv				,
		output	                    ad7689_spi_sclk			,
		output	                    ad7689_spi_mosi			,
		input	                    ad7689_spi_miso			,	
		
        //---------------------------------------------	AXI
        (*mark_debug="true"*)output     wire    [31:0]  axi_i_out             ,
        (*mark_debug="true"*)output     wire            axi_i_wr              ,
        (*mark_debug="true"*)output     wire            axi_i_tlast           ,		
				

		//---------------------------------------------	Trigger
//		input						trigger_reset			,
//		input	[32-1:0]			trigger_in				,
//		output	[32-1:0]			trigger_out				,
		
		//---------------------------------------------	For developer
		output	[ 4-1:0]			debug_sig
	);
	
	//*****************************************************************************
	// Parameter definition
	//*****************************************************************************
	
	
	//*****************************************************************************
	// Internal register and wire declarations
	//*****************************************************************************
//	wire	[32-1:0]			trigger_in_int		;
//	wire	[32-1:0]			trigger_in_ext		;
//	(*mark_debug="true"*)wire	[32-1:0]			axis_trigger_tdata	;
//	(*mark_debug="true"*)wire						axis_trigger_tvalid	;
//	(*mark_debug="true"*)wire						axis_trigger_tready	;

	(*mark_debug="true"*)wire	[32-1:0]			axis_eeg16_tdata	;
	(*mark_debug="true"*)wire						axis_eeg16_tlast	;
	(*mark_debug="true"*)wire						axis_eeg16_tready	;
	(*mark_debug="true"*)wire						axis_eeg16_tvalid	;
	
	(*mark_debug="true"*)wire	[32-1:0]			axis_eeg24_tdata	;
	(*mark_debug="true"*)wire						axis_eeg24_tlast	;
	(*mark_debug="true"*)wire						axis_eeg24_tready	;
	(*mark_debug="true"*)wire						axis_eeg24_tvalid	;
	
	(*mark_debug="true"*)wire	[32-1:0]			axis_emg_tdata_tmp		;
	(*mark_debug="true"*)wire						axis_emg_tlast_tmp		;
	(*mark_debug="true"*)wire						axis_emg_tready_tmp		;
	(*mark_debug="true"*)wire						axis_emg_tvalid_tmp		;

	wire	[48-1:0]			accel_data			;
	
	wire						sw_enable			;
	wire						sw_data_sel			;
	wire	[64-1:0]			sw_data_0			;
	wire	[64-1:0]			sw_data_1			;
	wire	[64-1:0]			sw_state			;
	
	wire	[ 4-1:0]			debug_sig_2116		;
	wire	[ 4-1:0]			debug_sig_eeg		;
	wire	[ 4-1:0]			debug_sig_msg		;
	                     	
	(*mark_debug="true"*)wire    [ 7:0]              m_axis_eeg_tdata	;
	(*mark_debug="true"*)wire    [ 0:0]              m_axis_eeg_tkeep	;
	(*mark_debug="true"*)wire                        m_axis_eeg_tlast	;
	(*mark_debug="true"*)wire                        m_axis_eeg_tvalid   ;
	
	(*mark_debug="true"*)wire    [ 7:0]              m_axis_emg_tdata	;
	(*mark_debug="true"*)wire    [ 0:0]              m_axis_emg_tkeep	;
	(*mark_debug="true"*)wire                        m_axis_emg_tlast	;
	(*mark_debug="true"*)wire                        m_axis_emg_tvalid   ;
	
	(*mark_debug="true"*)wire    [1:0]               eeg_emg_sel         ;
	(*mark_debug="true"*)wire    [15:0]              eeg_send_package_num;
	(*mark_debug="true"*)wire    [15:0]              emg_send_package_num;
	
//    (*mark_debug="true"*)wire                        imp_test_en         ;
//    (*mark_debug="true"*)wire                        stim_en             ;
//	(*mark_debug="true"*)wire     [23:0]             stim_data0          ;
//	(*mark_debug="true"*)wire                        stim_data0_en       ;
//	wire     [23:0]             stim_data1          ;
//	wire                        stim_data1_en       ;
//    wire     [24*2-1:0]         stim_data           ;
//    wire     [1:0]              stim_data_en        ;
//    wire     [1:0]              dac_cs_n            ;
//    wire     [1:0]              dac_sclk            ;
//    wire     [1:0]              dac_sdi             ;   
//    wire     [3:0]              state[0:1]          ;
//    wire     [23:0]             imp_data_dout[0:1]  ;    
//    (*mark_debug="true"*)wire     [23:0]             imp_data_dout0      ;
//    wire     [23:0]             imp_data_dout1      ;
//    wire     [24*2-1:0]         imp_data_dout_tmp   ;
//    (*mark_debug="true"*)wire                        fifo_empty0         ;
//    wire                        fifo_empty1         ;
//    (*mark_debug="true"*)wire                        fifo_no_empty       ;
//    reg      [3:0]              fifo_en_cnt         ;
//    reg                         imp_fifo_rd_en      ;
	(*mark_debug="true"*)wire                        adgs5414_start        ;
	wire    [63:0]              cmd_data              ;
	(*mark_debug="true"*)wire                        adgs5414_start2        ;
	wire    [63:0]              cmd_data2              ;	
	wire    [9:0]               trigger_out_final     ;
	wire                        diff_pkt_data_sel     ;
	(*mark_debug="true"*)wire                        stop_sample           ;
	(*mark_debug="true"*)wire                        emg_ads1299_spi_sclk_tmp ;
	
	assign  emg_ads1299_reset_n = 1'b1 ;
	assign  emg_ads1299_pwdn_n  = 1'b1 ;
//    assign stim_data[2*24-1:0]={stim_data1[23:0],stim_data0[23:0]};
//    assign stim_data_en[1:0]={stim_data1_en,stim_data0_en};
//    assign fifo_no_empty=(~fifo_empty0)&(~fifo_empty1) ;
//    assign imp_data_dout_tmp[24*2-1:0]={imp_data_dout1[23:0],imp_data_dout0[23:0]};
//    assign dac1_cs_n=dac_cs_n[0];
//    assign dac1_sclk=dac_sclk[0];
//    assign dac1_sdi=dac_sdi[0];
//    assign dac2_cs_n=dac_cs_n[1];
//    assign dac2_sclk=dac_sclk[1];
//    assign dac2_sdi=dac_sdi[1];
    assign m_axis_record_tkeep = 1'b1 ;
    assign axis_emg_tdata[31:0]=diff_pkt_data_sel?axis_emg_tdata_tmp[31:0]:32'b0 ;
    assign axis_emg_tlast=diff_pkt_data_sel?axis_emg_tlast_tmp:1'b0 ;
    assign axis_emg_tready=diff_pkt_data_sel?axis_emg_tready_tmp:1'b0;
    assign axis_emg_tvalid=diff_pkt_data_sel?axis_emg_tvalid_tmp:1'b0;
    assign emg_ads1299_spi_sclk=(emg_ads1299_spi_cs==1'b0)?emg_ads1299_spi_sclk_tmp:1'b0;

//genvar	j;
//generate
//	for(j=0;j<2;j=j+1) begin : impedance 
//		assign imp_data_dout[j] = imp_data_dout_tmp[24*j+23 : 24*j];
//	end
//endgenerate 

//always @(posedge clk or negedge rst_n) begin //刺激等待时间
//    if (!rst_n) begin
//        fifo_en_cnt[3:0] <= 4'b0;
//    end else if(imp_test_en==1'b1)begin
//        if((fifo_no_empty==1'b1)&&(state[0] == 4'h5)&&(state[1] == 4'h5))begin 
//            if(fifo_en_cnt[3:0]==4'd10)begin
//                fifo_en_cnt[3:0] <= fifo_en_cnt[3:0] ;
//            end else begin
//                fifo_en_cnt[3:0] <= fifo_en_cnt[3:0] + 1'b1 ;
//            end
//        end else begin
//            fifo_en_cnt[3:0] <= 4'b0;
//        end
//    end else begin
//        fifo_en_cnt[3:0] <= 4'b0;
//    end
//end 

//always @(posedge clk or negedge rst_n) begin //刺激等待时间
//    if (!rst_n) begin
//        imp_fifo_rd_en <= 1'b0;
//    end else if(imp_test_en==1'b1)begin
//        if((fifo_no_empty==1'b1)&&(state[0] == 4'h5)&&(state[1] == 4'h5)&&(fifo_en_cnt[3:0]==4'h1))begin 
//            imp_fifo_rd_en <= 1'b1;
//        end else begin 
//            imp_fifo_rd_en <= 1'b0;
//        end
//    end else begin
//        imp_fifo_rd_en <= 1'b0;
//    end
//end
	
	//*****************************************************************************
	// Instantiation
	//*****************************************************************************
//	trigger_top#
//		(
//			.CLK_PERIOD			( CLK_PERIOD			)
//		)
//	u_trigger_top
//		(
//			.clk				( clk					),
//			.rst_n				( rst_n					),
			
//			.trigger_reset		( trigger_reset			),

//			.trigger_in_int		( trigger_in_int		),
//			.trigger_in_ext		( trigger_in_ext		),

//			.m_trigger_tdata	( axis_trigger_tdata	),
//			.m_trigger_tvalid	( axis_trigger_tvalid	),
//			.m_trigger_tready	( axis_trigger_tready	),

//			.error_overflow		( 						)
//		);

//	rhs2116_top# 
//		(
//			.CLK_PERIOD			( CLK_PERIOD			),
//			.VERSION			( VERSION				),
//			.SPI_CLK_DIV		( RHS2116_SPI_CLK_DIV	),
//			.CHIPSET_QTY		( RSH2116_QTY			),
//			.SPI_TRANS_PERIOD	( RSH2116_SPI_PERIOD	)
//		)
//	u_rhs2116_top
//		(
//			.clk				( clk					),
//			.rst_n				( rst_n					),
			
//			.bram_addr			( bram_stim_addr		),
//			.bram_clk			( bram_stim_clk			),
//			.bram_din			( bram_stim_din			),
//			.bram_dout			( bram_stim_dout		),
//			.bram_en			( bram_stim_en			),
//			.bram_rst			( bram_stim_rst			),
//			.bram_we			( bram_stim_we			),
			
//			.interrupt			( stim_int			    ),
//			.stim_event_code	( 		),//trigger_in_int （2026.1.28 delete）
			
//			//------------------------------------------ FIFO: stim input and record output
//			.axi_str_txd_tdata	( m_axis_stim_tdata		),
//			.axi_str_txd_tlast	( m_axis_stim_tlast		),
//			.axi_str_txd_tready	( m_axis_stim_tready	),
//			.axi_str_txd_tvalid	( m_axis_stim_tvalid	),
			
//			.axi_str_rxd_tdata	( axis_eeg16_tdata		),
//			.axi_str_rxd_tlast	( axis_eeg16_tlast		),
//			.axi_str_rxd_tready	( axis_eeg16_tready		),
//			.axi_str_rxd_tvalid	( axis_eeg16_tvalid		),

//			//------------------------------------------ channel stim state
//			.sw_enable			( sw_enable				),
//			.sw_data_sel		( sw_data_sel			),
//			.sw_data_0			( sw_data_0				),
//			.sw_data_1			( sw_data_1				),
//			.sw_state			( 0				        ),//sw_state
			
//			//------------------------------------------ device
//			.stim_en			( rsh2116_enable		),
//			.cs					( rsh2116_spi_cs		),
//			.sclk				( rsh2116_spi_sclk		),
//			.mosi				( rsh2116_spi_mosi		),
//			.miso				( rsh2116_spi_miso		),
			
//			.debug_sig			( debug_sig_2116		)
//		);
	
	eeg_top#
		(
			.CLK_PERIOD			 ( CLK_PERIOD		    	 )
		)
	u0_eeg_top
		(
			.clk				 ( clk				    	 ),
			.rst_n				 ( rst_n					 ),
			
			.bram_addr			 ( bram_eeg_addr			 ),
			.bram_clk			 ( bram_eeg_clk		    	 ),
			.bram_din			 ( bram_eeg_din		     	 ),
			.bram_dout			 ( bram_eeg_dout			 ),
			.bram_en			 ( bram_eeg_en		     	 ),
			.bram_rst		   	 ( bram_eeg_rst			     ),
			.bram_we			 ( bram_eeg_we			     ),

			.interrupt			 ( eeg_int				     ),
			
			//------------------------------------------ FIFO: eeg output
			.axis_record_tdata	 ( axis_eeg24_tdata		     ),
			.axis_record_tlast	 ( axis_eeg24_tlast		     ),
			.axis_record_tready	 ( axis_eeg24_tready		 ),
			.axis_record_tvalid	 ( axis_eeg24_tvalid		 ),
			
			//------------------------------------------ device spi
			.cs					 ( eeg_ads1299_spi_cs	     ),
			.sclk				 ( eeg_ads1299_spi_sclk	     ),
			.mosi				 ( eeg_ads1299_spi_mosi	     ),
			.miso				 ( eeg_ads1299_spi_miso	     ),
			.drdy				 ( eeg_ads1299_drdy_n	     ),
			.start				 ( eeg_ads1299_start		 ),

			//------------------------------------------ debug signal
			.debug_sig			( debug_sig_eeg			)
		);
	
	//for emg
	eeg_top1#
		(
			.CLK_PERIOD			( CLK_PERIOD			),
			.CHIPSET_QTY        ( EMG_CHIPSET_QTY       ),
			.SPIS_QTY           ( EMG_SPIS_QTY          ),
			.SPI_SLAVE_QTY      ( EMG_SPI_SLAVE_QTY     )
		)
	u1_eeg_top
		(
			.clk				 ( clk					     ),
			.rst_n				 ( rst_n					 ),
			
			.bram_addr			 ( bram_emg_addr			 ),
			.bram_clk			 ( bram_emg_clk			     ),
			.bram_din			 ( bram_emg_din			     ),
			.bram_dout			 ( bram_emg_dout			 ),
			.bram_en			 ( bram_emg_en			     ),
			.bram_rst			 ( bram_emg_rst			     ),
			.bram_we			 ( bram_emg_we			     ),

			.interrupt			 ( emg_int				     ),
			
			//------------------------------------------ FIFO: emg output
			.axis_record_tdata	 ( axis_emg_tdata_tmp[31:0]	 ),
			.axis_record_tlast	 ( axis_emg_tlast_tmp		 ),
			.axis_record_tready	 ( axis_emg_tready_tmp		 ),
			.axis_record_tvalid	 ( axis_emg_tvalid_tmp		 ),
			
			//------------------------------------------ device interface
			.cs					 ( emg_ads1299_spi_cs	     ),
			.sclk				 ( emg_ads1299_spi_sclk_tmp  ),
			.mosi				 ( emg_ads1299_spi_mosi	     ),
			.miso				 ( emg_ads1299_spi_miso	     ),
			.drdy				 ( emg_ads1299_drdy_n	     ),
			.start				 ( emg_ads1299_start		 ),
			
//			.reset_n			( emg_ads1299_reset_n	),
//			.pwdn_n				( emg_ads1299_pwdn_n	)
			//------------------------------------------ debug signal
			.debug_sig			 ( debug_sig_eeg			 )
		);
		
	cur_mon_top# 
		(
			.CLK_PERIOD			( 500					)//  10
		)
	u_cur_mon_top
		(
			.clk				( clk 					),
			.rst_n				( rst_n 				),
			
			.bram_addr			( bram_cur_addr			),
			.bram_clk			( bram_cur_clk			),
			.bram_din			( bram_cur_din			),
			.bram_dout			( bram_cur_dout			),
			.bram_en			( bram_cur_en			),
			.bram_rst			( bram_cur_rst			),
			.bram_we			( bram_cur_we			),

			.stim_state			( sw_data_1				),
			
			.interrupt			( cur_int				),

			.cnv				( ad7689_cnv			),
			.sck				( ad7689_spi_sclk		),
			.mosi				( ad7689_spi_mosi		),
			.miso				( ad7689_spi_miso		),
			
			.axi_i_out          ( axi_i_out[31:0]       ),
            .axi_i_wr           ( axi_i_wr              ),
            .axi_i_tlast        ( axi_i_tlast           ),

			.debug_sig			( debug_sig_cur			)
		);	
		
		
	accel_top# 
		(
			.CLK_PERIOD		    ( CLK_PERIOD			)
		)
	u_accel_top
		(
			.clk			    ( clk 			        ),
			.rst_n			    ( rst_n 		        ),
			
			.bram_addr			( bram_accel_addr		),
			.bram_clk			( bram_accel_clk		),
			.bram_din			( bram_accel_din		),
			.bram_dout			( bram_accel_dout		),
			.bram_en			( bram_accel_en			),
			.bram_rst			( bram_accel_rst		),
			.bram_we			( bram_accel_we			),

			.interrupt			( accel_int				),
			.accel_data			( accel_data			),

			.accel_spi_cs		( accel_spi_cs			),
			.accel_spi_sclk		( accel_spi_sclk		),
			.accel_spi_mosi		( accel_spi_mosi		),
			.accel_spi_miso		( accel_spi_miso		),
			.accel_int0			( accel_int0			),
			.accel_int1			( accel_int1			)
		);

//	channel_switch# 
//		(
//			.CLK_PERIOD		    ( CLK_PERIOD			)
//		)
//	u0_channel_switch
//		(
//			.clk			    ( clk 			        ),
//			.rst_n			    ( rst_n 		        ),
//            .cmd_data           ( cmd_data[63:0]        ),
//			.adgs5414_start     ( adgs5414_start        ),
//			.sync			    ( adg1414_spi_sync   	),
//			.sclk			    ( adg1414_spi_sclk   	),
//			.sdin			    ( adg1414_spi_mosi   	),
//			.sdo			    ( adg1414_spi_miso   	)
//		);
		
//	channel_switch# 
//		(
//			.CLK_PERIOD		    ( CLK_PERIOD			)
//		)
//	u1_channel_switch
//		(
//			.clk			    ( clk 			        ),
//			.rst_n			    ( rst_n 		        ),
//            .cmd_data           ( cmd_data2[63:0]        ),
//			.adgs5414_start     ( adgs5414_start2        ),
//			.sync			    ( adg1414_spi_sync2   	),
//			.sclk			    ( adg1414_spi_sclk2   	),
//			.sdin			    ( adg1414_spi_mosi2   	),
//			.sdo			    ( adg1414_spi_miso2   	)
//		);		
		
//	channel_switch# 
//		(
//			.CLK_PERIOD		    ( CLK_PERIOD			)
//		)
//	u_channel_switch
//		(
//			.clk			    ( clk 			        ),
//			.rst_n			    ( rst_n 		        ),

//			.enable				( sw_enable				),
//			.data_sel			( sw_data_sel			),
//			.data_0		    	( sw_data_0				),
//			.data_1		    	( sw_data_1				),
//			.state				( sw_state				),
			
//			.sync			    ( adg1414_spi_sync   	),
//			.sclk			    ( adg1414_spi_sclk   	),
//			.sdin			    ( adg1414_spi_mosi   	),
//			.sdo			    ( adg1414_spi_miso   	)
//		);
		
	upload_top# 
		(
			.CLK_PERIOD		    	( CLK_PERIOD			)
		)
	u0_upload_top
		(
			.clk			    	( clk 			        ),
			.rst_n			    	( rst_n 		        ),
			
			//------------------------------------------ config
			.bram_addr				( bram_msg_addr			),
			.bram_clk				( bram_msg_clk			),
			.bram_din				( bram_msg_din			),
			.bram_dout				( bram_msg_dout			),
			.bram_en				( bram_msg_en			),
			.bram_rst				( bram_msg_rst			),
			.bram_we				( bram_msg_we			),

			//------------------------------------------ recive
			.s_axis_trigger_tdata	(0 	),//axis_trigger_tdata
			.s_axis_trigger_tvalid	(0 	),//axis_trigger_tvalid
			.s_axis_trigger_tready	( 	),//axis_trigger_tready

			.s_axis_eeg16_tdata		( 0		),//axis_eeg16_tdata
			.s_axis_eeg16_tlast		( 0		),//axis_eeg16_tlast
			.s_axis_eeg16_tready	( 		),//axis_eeg16_tready
			.s_axis_eeg16_tvalid	( 0		),//axis_eeg16_tvalid

			.s_axis_eeg24_tdata		( axis_eeg24_tdata		),
			.s_axis_eeg24_tlast		( axis_eeg24_tlast		),
			.s_axis_eeg24_tready	( axis_eeg24_tready		),
			.s_axis_eeg24_tvalid	( axis_eeg24_tvalid		),

			.s_axis_emg_tdata		( 0		),//axis_emg_tdata
			.s_axis_emg_tlast		( 0		),//axis_emg_tlast
			.s_axis_emg_tready		( 		),//axis_emg_tready
			.s_axis_emg_tvalid		( 0		),//axis_emg_tvalid

			.accel_data				( accel_data			),
			
			//------------------------------------------ upload
			.m_axis_record_tfull	( 1'b0              	),
			.m_axis_record_tdata	( m_axis_eeg_tdata   	),
			.m_axis_record_tkeep	( m_axis_eeg_tkeep   	),
			.m_axis_record_tlast	( m_axis_eeg_tlast	    ),
			.m_axis_record_tready	( 1'b1              	),
			.m_axis_record_tvalid	( m_axis_eeg_tvalid  	),

			//------------------------------------------ debug signal
			.debug_sig				( debug_sig_msg			)
		);
		
	upload_top# 
		(
			.CLK_PERIOD		    	( CLK_PERIOD			)
		)
	u1_upload_top
		(
			.clk			    	( clk 			        ),
			.rst_n			    	( rst_n 		        ),
			
			//------------------------------------------ config
			.bram_addr				( bram_msg_emg_addr			),
			.bram_clk				( bram_msg_emg_clk			),
			.bram_din				( bram_msg_emg_din			),
			.bram_dout				( bram_msg_emg_dout			),
			.bram_en				( bram_msg_emg_en			),
			.bram_rst				( bram_msg_emg_rst			),
			.bram_we				( bram_msg_emg_we			),

			//------------------------------------------ recive
			.s_axis_trigger_tdata	( 0	),//axis_trigger_tdata
			.s_axis_trigger_tvalid	( 0	),//axis_trigger_tvalid
			.s_axis_trigger_tready	( 	),

			.s_axis_eeg16_tdata		( 0		),
			.s_axis_eeg16_tlast		( 0		),
			.s_axis_eeg16_tready	( 		),
			.s_axis_eeg16_tvalid	( 0		),

			.s_axis_eeg24_tdata		( axis_emg_tdata_tmp     	),
			.s_axis_eeg24_tlast		( axis_emg_tlast_tmp    	),
			.s_axis_eeg24_tready	( axis_emg_tready_tmp  		),
			.s_axis_eeg24_tvalid	( axis_emg_tvalid_tmp 		),

			.s_axis_emg_tdata		( 0		),//axis_emg_tdata
			.s_axis_emg_tlast		( 0		),//axis_emg_tlast
			.s_axis_emg_tready		( 		),//axis_emg_tready
			.s_axis_emg_tvalid		( 0		),//axis_emg_tvalid

			.accel_data				( 0			),
			
			//------------------------------------------ upload
			.m_axis_record_tfull	( 1'b0          	),
			.m_axis_record_tdata	( m_axis_emg_tdata	),
			.m_axis_record_tkeep	( m_axis_emg_tkeep	),
			.m_axis_record_tlast	( m_axis_emg_tlast	),
			.m_axis_record_tready	( 1'b1          	),
			.m_axis_record_tvalid	( m_axis_emg_tvalid	),

			//------------------------------------------ debug signal
			.debug_sig				( 			)
		);	
		
eeg_emg_upload  u_eeg_emg_upload(
    .clk				   ( clk 			          ),	
    .rst_n				   ( rst_n 		              ),
    .m_axis_eeg_tdata	   ( m_axis_eeg_tdata[7:0]    ),
    .m_axis_eeg_tlast	   ( m_axis_eeg_tlast         ),
    .m_axis_eeg_tvalid	   ( m_axis_eeg_tvalid        ),

    .m_axis_emg_tdata	   (m_axis_emg_tdata[7:0]     ),
    .m_axis_emg_tlast	   (m_axis_emg_tlast          ),
    .m_axis_emg_tvalid	   (m_axis_emg_tvalid         ),

    .diff_pkt_data_sel     (diff_pkt_data_sel         ),
    .eeg_emg_sel           (eeg_emg_sel[1:0]          ),//eeg_emg_sel[1]：emg，eeg_emg_sel[0]：eeg  2'b10
    .eeg_send_package_num  (eeg_send_package_num[15:0]),//10*196+85+14=2059   16'd2059
    .emg_send_package_num  (emg_send_package_num[15:0]),//10*28+85+14=379    16'd379
    .stop_sample           (stop_sample                ),
    .eeg_emg_tdata        (m_axis_record_tdata[7:0]   ),
    .eeg_emg_tvalid       (m_axis_record_tvalid       ),
    .eeg_emg_tlast        (m_axis_record_tlast        )
    );
		
//genvar	i;
//generate
//		for(i=0;i<2;i=i+1) begin : dac80508_controller_arrange
//		dac80508_controller u_dac80508_controller(
//		.clk           (clk     ),//sys_clk
//        .rst_n         (rst_n   ),
//        .stim_en       (stim_en     ),
//        .imp_test_en   (imp_test_en ),
//        .stim_data     (stim_data[i*24+23:i*24]),   
//        .stim_data_en  (stim_data_en[i]        ),     
//        .cs_n          (dac_cs_n[i] ),
//        .sclk          (dac_sclk[i] ),
//        .sdi           (dac_sdi[i]  ),
//        .state         (state[i]    ),
//        .data_in       (imp_data_dout[i] ),//data_in[j],{8{imp_data[15:0]}} 
//        .imp_fifo_rd_en(imp_fifo_rd_en   )
//        );
//	   end
//endgenerate

// fifo_generator_3 u0_fifo_generator_3(
//     .full(     ),
//     .din(stim_data0[23:0]),
//     .wr_en(stim_data0_en),
//     .empty(fifo_empty0   ),
//     .dout(imp_data_dout0[23:0]),
//     .rd_en(imp_fifo_rd_en),
//     .rst(~rst_n),
//     .wr_clk(clk),
//     .rd_clk(clk)  //clk_100m
//     );
     
//fifo_generator_3 u1_fifo_generator_3(
//     .full(     ),
//     .din(stim_data1[23:0]),
//     .wr_en(stim_data1_en),
//     .empty(fifo_empty1   ),
//     .dout(imp_data_dout1[23:0]),
//     .rd_en(imp_fifo_rd_en),
//     .rst(~rst_n),
//     .wr_clk(clk),
//     .rd_clk(clk)  //clk_100m
//     );         

stim_config# 
	(
		.SPIS_QTY			( 4						),
		.SPI_DATA_WIDTH		( 8						)
	)
u_stim_config
	(
		.clk				  ( clk					     ),
		.rst_n				  ( rst_n					 ),
		
		.bram_addr			  ( bram_imp_addr			 ),
		.bram_clk			  ( bram_imp_clk			 ),
		.bram_din			  ( bram_imp_din			 ),
		.bram_dout			  ( bram_imp_dout			 ),
		.bram_en			  ( bram_imp_en				 ),
		.bram_rst			  ( bram_imp_rst			 ),
		.bram_we			  ( bram_imp_we				 ),
		.eeg_emg_sel          (eeg_emg_sel[1:0]          ),
		.eeg_send_package_num (eeg_send_package_num[15:0]),
		.emg_send_package_num (emg_send_package_num[15:0]),
		.diff_pkt_data_sel    (diff_pkt_data_sel         ),
		.stop_sample          (stop_sample               )
	); 						
		
		
	//*****************************************************************************
	// Wire assignment
	//*****************************************************************************
//	assign trigger_in_ext = trigger_in[31:0];//{6'b0,trigger_out_final[9:0],trigger_in[15:0]};
//	assign trigger_in_int[31:0]={22'b0,trigger_out_final[9:0]};
//	assign trigger_out = trigger_in_int;

	assign debug_sig = debug_sig_2116;
//	assign debug_sig[0] = axis_eeg24_tvalid;
//	assign debug_sig[1] = axis_eeg24_tlast;
//	assign debug_sig[2] = axis_eeg24_tready;
//	assign debug_sig[3] = 1'b0;
	
endmodule