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chunk-sync
2026-09-11 16:18:15 +08:00
parent 18a979ac62
commit e4ba5f5837
1650 changed files with 2176627 additions and 191020 deletions
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c64_pro.gen/sources_1/bd/design_a9_1/hdl/design_a9_1_wrapper.v
+471 -62
View File
@@ -2,8 +2,8 @@
//Copyright 2022-2023 Advanced Micro Devices, Inc. All Rights Reserved.
//--------------------------------------------------------------------------------
//Tool Version: Vivado v.2023.1 (win64) Build 3865809 Sun May 7 15:05:29 MDT 2023
//Date : Mon Apr 29 21:29:57 2024
//Host : 840-5CG14025H4 running 64-bit major release (build 9200)
//Date : Thu Aug 20 13:40:13 2026
//Host : DESKTOP-VN054CM running 64-bit major release (build 9200)
//Command : generate_target design_a9_1_wrapper.bd
//Design : design_a9_1_wrapper
//Purpose : IP block netlist
@@ -11,7 +11,9 @@
`timescale 1 ps / 1 ps
module design_a9_1_wrapper
(DDR_addr,
(CHANN_EN_tri_io,
CHANN_SEL_tri_io,
DDR_addr,
DDR_ba,
DDR_cas_n,
DDR_ck_n,
@@ -32,6 +34,15 @@ module design_a9_1_wrapper
FIXED_IO_ps_clk,
FIXED_IO_ps_porb,
FIXED_IO_ps_srstb,
RST_AD5941_tri_io,
Z_IO_tri_io,
bram_cur_addr,
bram_cur_clk,
bram_cur_din,
bram_cur_dout,
bram_cur_en,
bram_cur_rst,
bram_cur_we,
bram_eeg_addr,
bram_eeg_clk,
bram_eeg_din,
@@ -46,6 +57,13 @@ module design_a9_1_wrapper
bram_emg_en,
bram_emg_rst,
bram_emg_we,
bram_imp_addr,
bram_imp_clk,
bram_imp_din,
bram_imp_dout,
bram_imp_en,
bram_imp_rst,
bram_imp_we,
bram_mems_addr,
bram_mems_clk,
bram_mems_din,
@@ -57,6 +75,13 @@ module design_a9_1_wrapper
bram_msg_clk,
bram_msg_din,
bram_msg_dout,
bram_msg_emg_addr,
bram_msg_emg_clk,
bram_msg_emg_din,
bram_msg_emg_dout,
bram_msg_emg_en,
bram_msg_emg_rst,
bram_msg_emg_we,
bram_msg_en,
bram_msg_rst,
bram_msg_we,
@@ -68,12 +93,14 @@ module design_a9_1_wrapper
bram_stim_rst,
bram_stim_we,
clk,
cur_spi_io0_io,
cur_spi_io1_io,
cur_spi_sck_io,
cur_spi_ss_io,
elec_mux_in_tri_io,
gpio0_0_tri_i,
gpio0_1_tri_o,
iic0_scl_io,
iic0_sda_io,
iic1_scl_io,
iic1_sda_io,
gpio0_tri_io,
int0,
int1,
int2,
@@ -83,12 +110,34 @@ module design_a9_1_wrapper
m_axis_stim_tready,
m_axis_stim_tvalid,
rst_n,
s_axis_record1_tdata,
s_axis_record1_tkeep,
s_axis_record1_tlast,
s_axis_record1_tready,
s_axis_record1_tvalid,
s_axis_record2_tdata,
s_axis_record2_tkeep,
s_axis_record2_tlast,
s_axis_record2_tready,
s_axis_record2_tvalid,
s_axis_record_tdata,
s_axis_record_tfull,
s_axis_record_tfull1,
s_axis_record_tfull2,
s_axis_record_tkeep,
s_axis_record_tlast,
s_axis_record_tready,
s_axis_record_tvalid);
s_axis_record_tvalid,
stim_spi_io0_io,
stim_spi_io1_io,
stim_spi_sck_io,
stim_spi_ss_io,
zcheck_spi_io0_io,
zcheck_spi_io1_io,
zcheck_spi_sck_io,
zcheck_spi_ss_io);
inout [1:0]CHANN_EN_tri_io;
inout [3:0]CHANN_SEL_tri_io;
inout [14:0]DDR_addr;
inout [2:0]DDR_ba;
inout DDR_cas_n;
@@ -110,6 +159,15 @@ module design_a9_1_wrapper
inout FIXED_IO_ps_clk;
inout FIXED_IO_ps_porb;
inout FIXED_IO_ps_srstb;
inout [0:0]RST_AD5941_tri_io;
inout [0:0]Z_IO_tri_io;
output [12:0]bram_cur_addr;
output bram_cur_clk;
output [31:0]bram_cur_din;
input [31:0]bram_cur_dout;
output bram_cur_en;
output bram_cur_rst;
output [3:0]bram_cur_we;
output [12:0]bram_eeg_addr;
output bram_eeg_clk;
output [31:0]bram_eeg_din;
@@ -124,6 +182,13 @@ module design_a9_1_wrapper
output bram_emg_en;
output bram_emg_rst;
output [3:0]bram_emg_we;
output [12:0]bram_imp_addr;
output bram_imp_clk;
output [31:0]bram_imp_din;
input [31:0]bram_imp_dout;
output bram_imp_en;
output bram_imp_rst;
output [3:0]bram_imp_we;
output [12:0]bram_mems_addr;
output bram_mems_clk;
output [31:0]bram_mems_din;
@@ -135,6 +200,13 @@ module design_a9_1_wrapper
output bram_msg_clk;
output [31:0]bram_msg_din;
input [31:0]bram_msg_dout;
output [12:0]bram_msg_emg_addr;
output bram_msg_emg_clk;
output [31:0]bram_msg_emg_din;
input [31:0]bram_msg_emg_dout;
output bram_msg_emg_en;
output bram_msg_emg_rst;
output [3:0]bram_msg_emg_we;
output bram_msg_en;
output bram_msg_rst;
output [3:0]bram_msg_we;
@@ -146,12 +218,14 @@ module design_a9_1_wrapper
output bram_stim_rst;
output [3:0]bram_stim_we;
output clk;
inout cur_spi_io0_io;
inout cur_spi_io1_io;
inout cur_spi_sck_io;
inout [0:0]cur_spi_ss_io;
inout [3:0]elec_mux_in_tri_io;
input [7:0]gpio0_0_tri_i;
output [31:0]gpio0_1_tri_o;
inout iic0_scl_io;
inout iic0_sda_io;
inout iic1_scl_io;
inout iic1_sda_io;
inout [2:0]gpio0_tri_io;
input int0;
input int1;
input int2;
@@ -161,13 +235,57 @@ module design_a9_1_wrapper
input m_axis_stim_tready;
output m_axis_stim_tvalid;
output [0:0]rst_n;
input [31:0]s_axis_record1_tdata;
input [3:0]s_axis_record1_tkeep;
input s_axis_record1_tlast;
output s_axis_record1_tready;
input s_axis_record1_tvalid;
input [31:0]s_axis_record2_tdata;
input [3:0]s_axis_record2_tkeep;
input s_axis_record2_tlast;
output s_axis_record2_tready;
input s_axis_record2_tvalid;
input [7:0]s_axis_record_tdata;
output s_axis_record_tfull;
output s_axis_record_tfull1;
output s_axis_record_tfull2;
input [0:0]s_axis_record_tkeep;
input s_axis_record_tlast;
output s_axis_record_tready;
input s_axis_record_tvalid;
inout stim_spi_io0_io;
inout stim_spi_io1_io;
inout stim_spi_sck_io;
inout [0:0]stim_spi_ss_io;
inout zcheck_spi_io0_io;
inout zcheck_spi_io1_io;
inout zcheck_spi_sck_io;
inout [0:0]zcheck_spi_ss_io;
wire [0:0]CHANN_EN_tri_i_0;
wire [1:1]CHANN_EN_tri_i_1;
wire [0:0]CHANN_EN_tri_io_0;
wire [1:1]CHANN_EN_tri_io_1;
wire [0:0]CHANN_EN_tri_o_0;
wire [1:1]CHANN_EN_tri_o_1;
wire [0:0]CHANN_EN_tri_t_0;
wire [1:1]CHANN_EN_tri_t_1;
wire [0:0]CHANN_SEL_tri_i_0;
wire [1:1]CHANN_SEL_tri_i_1;
wire [2:2]CHANN_SEL_tri_i_2;
wire [3:3]CHANN_SEL_tri_i_3;
wire [0:0]CHANN_SEL_tri_io_0;
wire [1:1]CHANN_SEL_tri_io_1;
wire [2:2]CHANN_SEL_tri_io_2;
wire [3:3]CHANN_SEL_tri_io_3;
wire [0:0]CHANN_SEL_tri_o_0;
wire [1:1]CHANN_SEL_tri_o_1;
wire [2:2]CHANN_SEL_tri_o_2;
wire [3:3]CHANN_SEL_tri_o_3;
wire [0:0]CHANN_SEL_tri_t_0;
wire [1:1]CHANN_SEL_tri_t_1;
wire [2:2]CHANN_SEL_tri_t_2;
wire [3:3]CHANN_SEL_tri_t_3;
wire [14:0]DDR_addr;
wire [2:0]DDR_ba;
wire DDR_cas_n;
@@ -189,6 +307,21 @@ module design_a9_1_wrapper
wire FIXED_IO_ps_clk;
wire FIXED_IO_ps_porb;
wire FIXED_IO_ps_srstb;
wire [0:0]RST_AD5941_tri_i_0;
wire [0:0]RST_AD5941_tri_io_0;
wire [0:0]RST_AD5941_tri_o_0;
wire [0:0]RST_AD5941_tri_t_0;
wire [0:0]Z_IO_tri_i_0;
wire [0:0]Z_IO_tri_io_0;
wire [0:0]Z_IO_tri_o_0;
wire [0:0]Z_IO_tri_t_0;
wire [12:0]bram_cur_addr;
wire bram_cur_clk;
wire [31:0]bram_cur_din;
wire [31:0]bram_cur_dout;
wire bram_cur_en;
wire bram_cur_rst;
wire [3:0]bram_cur_we;
wire [12:0]bram_eeg_addr;
wire bram_eeg_clk;
wire [31:0]bram_eeg_din;
@@ -203,6 +336,13 @@ module design_a9_1_wrapper
wire bram_emg_en;
wire bram_emg_rst;
wire [3:0]bram_emg_we;
wire [12:0]bram_imp_addr;
wire bram_imp_clk;
wire [31:0]bram_imp_din;
wire [31:0]bram_imp_dout;
wire bram_imp_en;
wire bram_imp_rst;
wire [3:0]bram_imp_we;
wire [12:0]bram_mems_addr;
wire bram_mems_clk;
wire [31:0]bram_mems_din;
@@ -214,6 +354,13 @@ module design_a9_1_wrapper
wire bram_msg_clk;
wire [31:0]bram_msg_din;
wire [31:0]bram_msg_dout;
wire [12:0]bram_msg_emg_addr;
wire bram_msg_emg_clk;
wire [31:0]bram_msg_emg_din;
wire [31:0]bram_msg_emg_dout;
wire bram_msg_emg_en;
wire bram_msg_emg_rst;
wire [3:0]bram_msg_emg_we;
wire bram_msg_en;
wire bram_msg_rst;
wire [3:0]bram_msg_we;
@@ -225,24 +372,52 @@ module design_a9_1_wrapper
wire bram_stim_rst;
wire [3:0]bram_stim_we;
wire clk;
wire cur_spi_io0_i;
wire cur_spi_io0_io;
wire cur_spi_io0_o;
wire cur_spi_io0_t;
wire cur_spi_io1_i;
wire cur_spi_io1_io;
wire cur_spi_io1_o;
wire cur_spi_io1_t;
wire cur_spi_sck_i;
wire cur_spi_sck_io;
wire cur_spi_sck_o;
wire cur_spi_sck_t;
wire [0:0]cur_spi_ss_i_0;
wire [0:0]cur_spi_ss_io_0;
wire [0:0]cur_spi_ss_o_0;
wire cur_spi_ss_t;
wire [0:0]elec_mux_in_tri_i_0;
wire [1:1]elec_mux_in_tri_i_1;
wire [2:2]elec_mux_in_tri_i_2;
wire [3:3]elec_mux_in_tri_i_3;
wire [0:0]elec_mux_in_tri_io_0;
wire [1:1]elec_mux_in_tri_io_1;
wire [2:2]elec_mux_in_tri_io_2;
wire [3:3]elec_mux_in_tri_io_3;
wire [0:0]elec_mux_in_tri_o_0;
wire [1:1]elec_mux_in_tri_o_1;
wire [2:2]elec_mux_in_tri_o_2;
wire [3:3]elec_mux_in_tri_o_3;
wire [0:0]elec_mux_in_tri_t_0;
wire [1:1]elec_mux_in_tri_t_1;
wire [2:2]elec_mux_in_tri_t_2;
wire [3:3]elec_mux_in_tri_t_3;
wire [7:0]gpio0_0_tri_i;
wire [31:0]gpio0_1_tri_o;
wire iic0_scl_i;
wire iic0_scl_io;
wire iic0_scl_o;
wire iic0_scl_t;
wire iic0_sda_i;
wire iic0_sda_io;
wire iic0_sda_o;
wire iic0_sda_t;
wire iic1_scl_i;
wire iic1_scl_io;
wire iic1_scl_o;
wire iic1_scl_t;
wire iic1_sda_i;
wire iic1_sda_io;
wire iic1_sda_o;
wire iic1_sda_t;
wire [0:0]gpio0_tri_i_0;
wire [1:1]gpio0_tri_i_1;
wire [2:2]gpio0_tri_i_2;
wire [0:0]gpio0_tri_io_0;
wire [1:1]gpio0_tri_io_1;
wire [2:2]gpio0_tri_io_2;
wire [0:0]gpio0_tri_o_0;
wire [1:1]gpio0_tri_o_1;
wire [2:2]gpio0_tri_o_2;
wire [0:0]gpio0_tri_t_0;
wire [1:1]gpio0_tri_t_1;
wire [2:2]gpio0_tri_t_2;
wire int0;
wire int1;
wire int2;
@@ -252,15 +427,125 @@ module design_a9_1_wrapper
wire m_axis_stim_tready;
wire m_axis_stim_tvalid;
wire [0:0]rst_n;
wire [31:0]s_axis_record1_tdata;
wire [3:0]s_axis_record1_tkeep;
wire s_axis_record1_tlast;
wire s_axis_record1_tready;
wire s_axis_record1_tvalid;
wire [31:0]s_axis_record2_tdata;
wire [3:0]s_axis_record2_tkeep;
wire s_axis_record2_tlast;
wire s_axis_record2_tready;
wire s_axis_record2_tvalid;
wire [7:0]s_axis_record_tdata;
wire s_axis_record_tfull;
wire s_axis_record_tfull1;
wire s_axis_record_tfull2;
wire [0:0]s_axis_record_tkeep;
wire s_axis_record_tlast;
wire s_axis_record_tready;
wire s_axis_record_tvalid;
wire stim_spi_io0_i;
wire stim_spi_io0_io;
wire stim_spi_io0_o;
wire stim_spi_io0_t;
wire stim_spi_io1_i;
wire stim_spi_io1_io;
wire stim_spi_io1_o;
wire stim_spi_io1_t;
wire stim_spi_sck_i;
wire stim_spi_sck_io;
wire stim_spi_sck_o;
wire stim_spi_sck_t;
wire [0:0]stim_spi_ss_i_0;
wire [0:0]stim_spi_ss_io_0;
wire [0:0]stim_spi_ss_o_0;
wire stim_spi_ss_t;
wire zcheck_spi_io0_i;
wire zcheck_spi_io0_io;
wire zcheck_spi_io0_o;
wire zcheck_spi_io0_t;
wire zcheck_spi_io1_i;
wire zcheck_spi_io1_io;
wire zcheck_spi_io1_o;
wire zcheck_spi_io1_t;
wire zcheck_spi_sck_i;
wire zcheck_spi_sck_io;
wire zcheck_spi_sck_o;
wire zcheck_spi_sck_t;
wire [0:0]zcheck_spi_ss_i_0;
wire [0:0]zcheck_spi_ss_io_0;
wire [0:0]zcheck_spi_ss_o_0;
wire zcheck_spi_ss_t;
IOBUF CHANN_EN_tri_iobuf_0
(.I(CHANN_EN_tri_o_0),
.IO(CHANN_EN_tri_io[0]),
.O(CHANN_EN_tri_i_0),
.T(CHANN_EN_tri_t_0));
IOBUF CHANN_EN_tri_iobuf_1
(.I(CHANN_EN_tri_o_1),
.IO(CHANN_EN_tri_io[1]),
.O(CHANN_EN_tri_i_1),
.T(CHANN_EN_tri_t_1));
IOBUF CHANN_SEL_tri_iobuf_0
(.I(CHANN_SEL_tri_o_0),
.IO(CHANN_SEL_tri_io[0]),
.O(CHANN_SEL_tri_i_0),
.T(CHANN_SEL_tri_t_0));
IOBUF CHANN_SEL_tri_iobuf_1
(.I(CHANN_SEL_tri_o_1),
.IO(CHANN_SEL_tri_io[1]),
.O(CHANN_SEL_tri_i_1),
.T(CHANN_SEL_tri_t_1));
IOBUF CHANN_SEL_tri_iobuf_2
(.I(CHANN_SEL_tri_o_2),
.IO(CHANN_SEL_tri_io[2]),
.O(CHANN_SEL_tri_i_2),
.T(CHANN_SEL_tri_t_2));
IOBUF CHANN_SEL_tri_iobuf_3
(.I(CHANN_SEL_tri_o_3),
.IO(CHANN_SEL_tri_io[3]),
.O(CHANN_SEL_tri_i_3),
.T(CHANN_SEL_tri_t_3));
IOBUF RST_AD5941_tri_iobuf_0
(.I(RST_AD5941_tri_o_0),
.IO(RST_AD5941_tri_io[0]),
.O(RST_AD5941_tri_i_0),
.T(RST_AD5941_tri_t_0));
IOBUF Z_IO_tri_iobuf_0
(.I(Z_IO_tri_o_0),
.IO(Z_IO_tri_io[0]),
.O(Z_IO_tri_i_0),
.T(Z_IO_tri_t_0));
IOBUF cur_spi_io0_iobuf
(.I(cur_spi_io0_o),
.IO(cur_spi_io0_io),
.O(cur_spi_io0_i),
.T(cur_spi_io0_t));
IOBUF cur_spi_io1_iobuf
(.I(cur_spi_io1_o),
.IO(cur_spi_io1_io),
.O(cur_spi_io1_i),
.T(cur_spi_io1_t));
IOBUF cur_spi_sck_iobuf
(.I(cur_spi_sck_o),
.IO(cur_spi_sck_io),
.O(cur_spi_sck_i),
.T(cur_spi_sck_t));
IOBUF cur_spi_ss_iobuf_0
(.I(cur_spi_ss_o_0),
.IO(cur_spi_ss_io[0]),
.O(cur_spi_ss_i_0),
.T(cur_spi_ss_t));
design_a9_1 design_a9_1_i
(.DDR_addr(DDR_addr),
(.CHANN_EN_tri_i({CHANN_EN_tri_i_1,CHANN_EN_tri_i_0}),
.CHANN_EN_tri_o({CHANN_EN_tri_o_1,CHANN_EN_tri_o_0}),
.CHANN_EN_tri_t({CHANN_EN_tri_t_1,CHANN_EN_tri_t_0}),
.CHANN_SEL_tri_i({CHANN_SEL_tri_i_3,CHANN_SEL_tri_i_2,CHANN_SEL_tri_i_1,CHANN_SEL_tri_i_0}),
.CHANN_SEL_tri_o({CHANN_SEL_tri_o_3,CHANN_SEL_tri_o_2,CHANN_SEL_tri_o_1,CHANN_SEL_tri_o_0}),
.CHANN_SEL_tri_t({CHANN_SEL_tri_t_3,CHANN_SEL_tri_t_2,CHANN_SEL_tri_t_1,CHANN_SEL_tri_t_0}),
.DDR_addr(DDR_addr),
.DDR_ba(DDR_ba),
.DDR_cas_n(DDR_cas_n),
.DDR_ck_n(DDR_ck_n),
@@ -281,6 +566,19 @@ module design_a9_1_wrapper
.FIXED_IO_ps_clk(FIXED_IO_ps_clk),
.FIXED_IO_ps_porb(FIXED_IO_ps_porb),
.FIXED_IO_ps_srstb(FIXED_IO_ps_srstb),
.RST_AD5941_tri_i(RST_AD5941_tri_i_0),
.RST_AD5941_tri_o(RST_AD5941_tri_o_0),
.RST_AD5941_tri_t(RST_AD5941_tri_t_0),
.Z_IO_tri_i(Z_IO_tri_i_0),
.Z_IO_tri_o(Z_IO_tri_o_0),
.Z_IO_tri_t(Z_IO_tri_t_0),
.bram_cur_addr(bram_cur_addr),
.bram_cur_clk(bram_cur_clk),
.bram_cur_din(bram_cur_din),
.bram_cur_dout(bram_cur_dout),
.bram_cur_en(bram_cur_en),
.bram_cur_rst(bram_cur_rst),
.bram_cur_we(bram_cur_we),
.bram_eeg_addr(bram_eeg_addr),
.bram_eeg_clk(bram_eeg_clk),
.bram_eeg_din(bram_eeg_din),
@@ -295,6 +593,13 @@ module design_a9_1_wrapper
.bram_emg_en(bram_emg_en),
.bram_emg_rst(bram_emg_rst),
.bram_emg_we(bram_emg_we),
.bram_imp_addr(bram_imp_addr),
.bram_imp_clk(bram_imp_clk),
.bram_imp_din(bram_imp_din),
.bram_imp_dout(bram_imp_dout),
.bram_imp_en(bram_imp_en),
.bram_imp_rst(bram_imp_rst),
.bram_imp_we(bram_imp_we),
.bram_mems_addr(bram_mems_addr),
.bram_mems_clk(bram_mems_clk),
.bram_mems_din(bram_mems_din),
@@ -306,6 +611,13 @@ module design_a9_1_wrapper
.bram_msg_clk(bram_msg_clk),
.bram_msg_din(bram_msg_din),
.bram_msg_dout(bram_msg_dout),
.bram_msg_emg_addr(bram_msg_emg_addr),
.bram_msg_emg_clk(bram_msg_emg_clk),
.bram_msg_emg_din(bram_msg_emg_din),
.bram_msg_emg_dout(bram_msg_emg_dout),
.bram_msg_emg_en(bram_msg_emg_en),
.bram_msg_emg_rst(bram_msg_emg_rst),
.bram_msg_emg_we(bram_msg_emg_we),
.bram_msg_en(bram_msg_en),
.bram_msg_rst(bram_msg_rst),
.bram_msg_we(bram_msg_we),
@@ -317,20 +629,26 @@ module design_a9_1_wrapper
.bram_stim_rst(bram_stim_rst),
.bram_stim_we(bram_stim_we),
.clk(clk),
.cur_spi_io0_i(cur_spi_io0_i),
.cur_spi_io0_o(cur_spi_io0_o),
.cur_spi_io0_t(cur_spi_io0_t),
.cur_spi_io1_i(cur_spi_io1_i),
.cur_spi_io1_o(cur_spi_io1_o),
.cur_spi_io1_t(cur_spi_io1_t),
.cur_spi_sck_i(cur_spi_sck_i),
.cur_spi_sck_o(cur_spi_sck_o),
.cur_spi_sck_t(cur_spi_sck_t),
.cur_spi_ss_i(cur_spi_ss_i_0),
.cur_spi_ss_o(cur_spi_ss_o_0),
.cur_spi_ss_t(cur_spi_ss_t),
.elec_mux_in_tri_i({elec_mux_in_tri_i_3,elec_mux_in_tri_i_2,elec_mux_in_tri_i_1,elec_mux_in_tri_i_0}),
.elec_mux_in_tri_o({elec_mux_in_tri_o_3,elec_mux_in_tri_o_2,elec_mux_in_tri_o_1,elec_mux_in_tri_o_0}),
.elec_mux_in_tri_t({elec_mux_in_tri_t_3,elec_mux_in_tri_t_2,elec_mux_in_tri_t_1,elec_mux_in_tri_t_0}),
.gpio0_0_tri_i(gpio0_0_tri_i),
.gpio0_1_tri_o(gpio0_1_tri_o),
.iic0_scl_i(iic0_scl_i),
.iic0_scl_o(iic0_scl_o),
.iic0_scl_t(iic0_scl_t),
.iic0_sda_i(iic0_sda_i),
.iic0_sda_o(iic0_sda_o),
.iic0_sda_t(iic0_sda_t),
.iic1_scl_i(iic1_scl_i),
.iic1_scl_o(iic1_scl_o),
.iic1_scl_t(iic1_scl_t),
.iic1_sda_i(iic1_sda_i),
.iic1_sda_o(iic1_sda_o),
.iic1_sda_t(iic1_sda_t),
.gpio0_tri_i({gpio0_tri_i_2,gpio0_tri_i_1,gpio0_tri_i_0}),
.gpio0_tri_o({gpio0_tri_o_2,gpio0_tri_o_1,gpio0_tri_o_0}),
.gpio0_tri_t({gpio0_tri_t_2,gpio0_tri_t_1,gpio0_tri_t_0}),
.int0(int0),
.int1(int1),
.int2(int2),
@@ -340,30 +658,121 @@ module design_a9_1_wrapper
.m_axis_stim_tready(m_axis_stim_tready),
.m_axis_stim_tvalid(m_axis_stim_tvalid),
.rst_n(rst_n),
.s_axis_record1_tdata(s_axis_record1_tdata),
.s_axis_record1_tkeep(s_axis_record1_tkeep),
.s_axis_record1_tlast(s_axis_record1_tlast),
.s_axis_record1_tready(s_axis_record1_tready),
.s_axis_record1_tvalid(s_axis_record1_tvalid),
.s_axis_record2_tdata(s_axis_record2_tdata),
.s_axis_record2_tkeep(s_axis_record2_tkeep),
.s_axis_record2_tlast(s_axis_record2_tlast),
.s_axis_record2_tready(s_axis_record2_tready),
.s_axis_record2_tvalid(s_axis_record2_tvalid),
.s_axis_record_tdata(s_axis_record_tdata),
.s_axis_record_tfull(s_axis_record_tfull),
.s_axis_record_tfull1(s_axis_record_tfull1),
.s_axis_record_tfull2(s_axis_record_tfull2),
.s_axis_record_tkeep(s_axis_record_tkeep),
.s_axis_record_tlast(s_axis_record_tlast),
.s_axis_record_tready(s_axis_record_tready),
.s_axis_record_tvalid(s_axis_record_tvalid));
IOBUF iic0_scl_iobuf
(.I(iic0_scl_o),
.IO(iic0_scl_io),
.O(iic0_scl_i),
.T(iic0_scl_t));
IOBUF iic0_sda_iobuf
(.I(iic0_sda_o),
.IO(iic0_sda_io),
.O(iic0_sda_i),
.T(iic0_sda_t));
IOBUF iic1_scl_iobuf
(.I(iic1_scl_o),
.IO(iic1_scl_io),
.O(iic1_scl_i),
.T(iic1_scl_t));
IOBUF iic1_sda_iobuf
(.I(iic1_sda_o),
.IO(iic1_sda_io),
.O(iic1_sda_i),
.T(iic1_sda_t));
.s_axis_record_tvalid(s_axis_record_tvalid),
.stim_spi_io0_i(stim_spi_io0_i),
.stim_spi_io0_o(stim_spi_io0_o),
.stim_spi_io0_t(stim_spi_io0_t),
.stim_spi_io1_i(stim_spi_io1_i),
.stim_spi_io1_o(stim_spi_io1_o),
.stim_spi_io1_t(stim_spi_io1_t),
.stim_spi_sck_i(stim_spi_sck_i),
.stim_spi_sck_o(stim_spi_sck_o),
.stim_spi_sck_t(stim_spi_sck_t),
.stim_spi_ss_i(stim_spi_ss_i_0),
.stim_spi_ss_o(stim_spi_ss_o_0),
.stim_spi_ss_t(stim_spi_ss_t),
.zcheck_spi_io0_i(zcheck_spi_io0_i),
.zcheck_spi_io0_o(zcheck_spi_io0_o),
.zcheck_spi_io0_t(zcheck_spi_io0_t),
.zcheck_spi_io1_i(zcheck_spi_io1_i),
.zcheck_spi_io1_o(zcheck_spi_io1_o),
.zcheck_spi_io1_t(zcheck_spi_io1_t),
.zcheck_spi_sck_i(zcheck_spi_sck_i),
.zcheck_spi_sck_o(zcheck_spi_sck_o),
.zcheck_spi_sck_t(zcheck_spi_sck_t),
.zcheck_spi_ss_i(zcheck_spi_ss_i_0),
.zcheck_spi_ss_o(zcheck_spi_ss_o_0),
.zcheck_spi_ss_t(zcheck_spi_ss_t));
IOBUF elec_mux_in_tri_iobuf_0
(.I(elec_mux_in_tri_o_0),
.IO(elec_mux_in_tri_io[0]),
.O(elec_mux_in_tri_i_0),
.T(elec_mux_in_tri_t_0));
IOBUF elec_mux_in_tri_iobuf_1
(.I(elec_mux_in_tri_o_1),
.IO(elec_mux_in_tri_io[1]),
.O(elec_mux_in_tri_i_1),
.T(elec_mux_in_tri_t_1));
IOBUF elec_mux_in_tri_iobuf_2
(.I(elec_mux_in_tri_o_2),
.IO(elec_mux_in_tri_io[2]),
.O(elec_mux_in_tri_i_2),
.T(elec_mux_in_tri_t_2));
IOBUF elec_mux_in_tri_iobuf_3
(.I(elec_mux_in_tri_o_3),
.IO(elec_mux_in_tri_io[3]),
.O(elec_mux_in_tri_i_3),
.T(elec_mux_in_tri_t_3));
IOBUF gpio0_tri_iobuf_0
(.I(gpio0_tri_o_0),
.IO(gpio0_tri_io[0]),
.O(gpio0_tri_i_0),
.T(gpio0_tri_t_0));
IOBUF gpio0_tri_iobuf_1
(.I(gpio0_tri_o_1),
.IO(gpio0_tri_io[1]),
.O(gpio0_tri_i_1),
.T(gpio0_tri_t_1));
IOBUF gpio0_tri_iobuf_2
(.I(gpio0_tri_o_2),
.IO(gpio0_tri_io[2]),
.O(gpio0_tri_i_2),
.T(gpio0_tri_t_2));
IOBUF stim_spi_io0_iobuf
(.I(stim_spi_io0_o),
.IO(stim_spi_io0_io),
.O(stim_spi_io0_i),
.T(stim_spi_io0_t));
IOBUF stim_spi_io1_iobuf
(.I(stim_spi_io1_o),
.IO(stim_spi_io1_io),
.O(stim_spi_io1_i),
.T(stim_spi_io1_t));
IOBUF stim_spi_sck_iobuf
(.I(stim_spi_sck_o),
.IO(stim_spi_sck_io),
.O(stim_spi_sck_i),
.T(stim_spi_sck_t));
IOBUF stim_spi_ss_iobuf_0
(.I(stim_spi_ss_o_0),
.IO(stim_spi_ss_io[0]),
.O(stim_spi_ss_i_0),
.T(stim_spi_ss_t));
IOBUF zcheck_spi_io0_iobuf
(.I(zcheck_spi_io0_o),
.IO(zcheck_spi_io0_io),
.O(zcheck_spi_io0_i),
.T(zcheck_spi_io0_t));
IOBUF zcheck_spi_io1_iobuf
(.I(zcheck_spi_io1_o),
.IO(zcheck_spi_io1_io),
.O(zcheck_spi_io1_i),
.T(zcheck_spi_io1_t));
IOBUF zcheck_spi_sck_iobuf
(.I(zcheck_spi_sck_o),
.IO(zcheck_spi_sck_io),
.O(zcheck_spi_sck_i),
.T(zcheck_spi_sck_t));
IOBUF zcheck_spi_ss_iobuf_0
(.I(zcheck_spi_ss_o_0),
.IO(zcheck_spi_ss_io[0]),
.O(zcheck_spi_ss_i_0),
.T(zcheck_spi_ss_t));
endmodule