sync chunk 11/12

c64_pro.sim/sim_1/behav/xsim/xsim.dir/pl_top_tb_behav/Compile_Options.txt

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+--incr --debug "typical" --relax --mt "2" -L "xil_defaultlib" -L "axi_infrastructure_v1_1_0" -L "axi_vip_v1_1_14" -L "processing_system7_vip_v1_0_16" -L "axis_infrastructure_v1_1_0" -L "axis_data_fifo_v2_0_10" -L "fifo_generator_v13_2_8" -L "axi_lite_ipif_v3_0_4" -L "lib_cdc_v1_0_2" -L "interrupt_control_v3_1_4" -L "axi_gpio_v2_0_30" -L "dist_mem_gen_v8_0_13" -L "lib_pkg_v1_0_2" -L "lib_srl_fifo_v1_0_2" -L "lib_fifo_v1_0_17" -L "axi_quad_spi_v3_2_27" -L "axi_datamover_v5_1_30" -L "axi_sg_v4_1_16" -L "axi_dma_v7_1_29" -L "axi_bram_ctrl_v4_1_8" -L "xlconstant_v1_1_7" -L "proc_sys_reset_v5_0_13" -L "smartconnect_v1_0" -L "axi_register_slice_v2_1_28" -L "xlconcat_v2_1_4" -L "uvm" -L "xilinx_vip" -L "unisims_ver" -L "unimacro_ver" -L "secureip" -L "xpm" --snapshot "pl_top_tb_behav" "xil_defaultlib.pl_top_tb" "xil_defaultlib.glbl" -log "elaborate.log" 

c64_pro.sim/sim_1/behav/xsim/xsim.dir/pl_top_tb_behav/TempBreakPointFile.txt

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+Breakpoint File Version 1.0

c64_pro.sim/sim_1/behav/xsim/xsim.dir/pl_top_tb_behav/xsim.rlx

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+
+{ 
+    crc :  82732466229793304  , 
+    ccp_crc :  0  , 
+    cmdline : " --incr --debug typical --relax --mt 2 -L xil_defaultlib -L axi_infrastructure_v1_1_0 -L axi_vip_v1_1_14 -L processing_system7_vip_v1_0_16 -L axis_infrastructure_v1_1_0 -L axis_data_fifo_v2_0_10 -L fifo_generator_v13_2_8 -L axi_lite_ipif_v3_0_4 -L lib_cdc_v1_0_2 -L interrupt_control_v3_1_4 -L axi_gpio_v2_0_30 -L dist_mem_gen_v8_0_13 -L lib_pkg_v1_0_2 -L lib_srl_fifo_v1_0_2 -L lib_fifo_v1_0_17 -L axi_quad_spi_v3_2_27 -L axi_datamover_v5_1_30 -L axi_sg_v4_1_16 -L axi_dma_v7_1_29 -L axi_bram_ctrl_v4_1_8 -L xlconstant_v1_1_7 -L proc_sys_reset_v5_0_13 -L smartconnect_v1_0 -L axi_register_slice_v2_1_28 -L xlconcat_v2_1_4 -L uvm -L xilinx_vip -L unisims_ver -L unimacro_ver -L secureip -L xpm --snapshot pl_top_tb_behav xil_defaultlib.pl_top_tb xil_defaultlib.glbl" , 
+    buildDate : "May  7 2023" , 
+    buildTime : "15:24:31" , 
+    linkCmd : "C:\\Xilinx\\Vivado\\2023.1\\data\\..\\tps\\mingw\\6.2.0\\win64.o\\nt\\bin\\gcc.exe -Wa,-W  -O -Wl,--stack,104857600 -o \"xsim.dir/pl_top_tb_behav/xsimk.exe\"   \"xsim.dir/pl_top_tb_behav/obj/xsim_0.win64.obj\" \"xsim.dir/pl_top_tb_behav/obj/xsim_1.win64.obj\" \"xsim.dir/pl_top_tb_behav/obj/xsim_2.win64.obj\" \"xsim.dir/pl_top_tb_behav/obj/xsim_3.win64.obj\" \"xsim.dir/pl_top_tb_behav/obj/xsim_4.win64.obj\" \"xsim.dir/pl_top_tb_behav/obj/xsim_5.win64.obj\" \"xsim.dir/pl_top_tb_behav/obj/xsim_6.win64.obj\" -L\"C:\\Xilinx\\Vivado\\2023.1\\lib\\win64.o\" -lrdi_simulator_kernel   -lrdi_simbridge_kernel" , 
+    aggregate_nets : 
+    [ 
+    ] 
+} 

c64_pro.sim/sim_1/behav/xsim/xsim.dir/pl_top_tb_behav/xsimSettings.ini

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+[General]
+ARRAY_DISPLAY_LIMIT=1024
+RADIX=hex
+TIME_UNIT=ns
+TRACE_LIMIT=65536
+VHDL_ENTITY_SCOPE_FILTER=true
+VHDL_PACKAGE_SCOPE_FILTER=false
+VHDL_BLOCK_SCOPE_FILTER=true
+VHDL_PROCESS_SCOPE_FILTER=false
+VHDL_PROCEDURE_SCOPE_FILTER=false
+VERILOG_MODULE_SCOPE_FILTER=true
+VERILOG_PACKAGE_SCOPE_FILTER=false
+VERILOG_BLOCK_SCOPE_FILTER=false
+VERILOG_TASK_SCOPE_FILTER=false
+VERILOG_PROCESS_SCOPE_FILTER=false
+INPUT_OBJECT_FILTER=true
+OUTPUT_OBJECT_FILTER=true
+INOUT_OBJECT_FILTER=true
+INTERNAL_OBJECT_FILTER=true
+CONSTANT_OBJECT_FILTER=true
+VARIABLE_OBJECT_FILTER=true
+INPUT_PROTOINST_FILTER=true
+OUTPUT_PROTOINST_FILTER=true
+INOUT_PROTOINST_FILTER=true
+INTERNAL_PROTOINST_FILTER=true
+CONSTANT_PROTOINST_FILTER=true
+VARIABLE_PROTOINST_FILTER=true
+SCOPE_NAME_COLUMN_WIDTH=332
+SCOPE_DESIGN_UNIT_COLUMN_WIDTH=153
+SCOPE_BLOCK_TYPE_COLUMN_WIDTH=100
+OBJECT_NAME_COLUMN_WIDTH=177
+OBJECT_VALUE_COLUMN_WIDTH=49
+OBJECT_DATA_TYPE_COLUMN_WIDTH=73
+PROCESS_NAME_COLUMN_WIDTH=75
+PROCESS_TYPE_COLUMN_WIDTH=75
+FRAME_INDEX_COLUMN_WIDTH=75
+FRAME_NAME_COLUMN_WIDTH=75
+FRAME_FILE_NAME_COLUMN_WIDTH=75
+FRAME_LINE_NUM_COLUMN_WIDTH=213
+LOCAL_NAME_COLUMN_WIDTH=75
+LOCAL_VALUE_COLUMN_WIDTH=73
+LOCAL_DATA_TYPE_COLUMN_WIDTH=0
+PROTO_NAME_COLUMN_WIDTH=0
+PROTO_VALUE_COLUMN_WIDTH=0
+INPUT_LOCAL_FILTER=1
+OUTPUT_LOCAL_FILTER=1
+INOUT_LOCAL_FILTER=1
+INTERNAL_LOCAL_FILTER=1
+CONSTANT_LOCAL_FILTER=1
+VARIABLE_LOCAL_FILTER=1

c64_pro.sim/sim_1/behav/xsim/xsim.dir/pl_top_tb_behav/xsimkernel.log

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+Running: xsim.dir/pl_top_tb_behav/xsimk.exe -simmode gui -wdb pl_top_tb_behav.wdb -simrunnum 0 -socket 65142
+Design successfully loaded
+Design Loading Memory Usage: 18040 KB (Peak: 18040 KB)
+Design Loading CPU Usage: 61 ms
+Simulation completed
+Simulation Memory Usage: 30840 KB (Peak: 30840 KB)
+Simulation CPU Usage: 211702 ms