GEM/BSI-901-fpga-software
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chenmin
2024-10-28 13:14:49 +08:00
parent d9ea3b1c85
commit 25cdd3c44c
3437 changed files with 10334573 additions and 0 deletions
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c64_pro.srcs/sources_1/bd/design_a9_1/ui/bd_41f4054b.ui
+98
View File
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{
"ActiveEmotionalView":"Default View",
"Default View_ScaleFactor":"0.755252",
"Default View_TopLeft":"-136,687",
"ExpandedHierarchyInLayout":"",
"guistr":"# # String gsaved with Nlview 7.5.8 2022-09-21 7111 VDI=41 GEI=38 GUI=JA:10.0
# -string -flagsOSRD
preplace port DDR -pg 1 -lvl 5 -x 1740 -y 1480 -defaultsOSRD
preplace port FIXED_IO -pg 1 -lvl 5 -x 1740 -y 1500 -defaultsOSRD
preplace port gpio0_0 -pg 1 -lvl 5 -x 1740 -y 480 -defaultsOSRD
preplace port gpio0_1 -pg 1 -lvl 5 -x 1740 -y 500 -defaultsOSRD
preplace port iic0 -pg 1 -lvl 5 -x 1740 -y 790 -defaultsOSRD
preplace port m_axis_stim -pg 1 -lvl 5 -x 1740 -y 1250 -defaultsOSRD
preplace port bram_stim -pg 1 -lvl 5 -x 1740 -y 80 -defaultsOSRD
preplace port bram_eeg -pg 1 -lvl 5 -x 1740 -y 220 -defaultsOSRD
preplace port bram_emg -pg 1 -lvl 5 -x 1740 -y 360 -defaultsOSRD
preplace port iic1 -pg 1 -lvl 5 -x 1740 -y 1090 -defaultsOSRD
preplace port bram_mems -pg 1 -lvl 5 -x 1740 -y 640 -defaultsOSRD
preplace port bram_msg -pg 1 -lvl 5 -x 1740 -y 970 -defaultsOSRD
preplace port s_axis_record -pg 1 -lvl 0 -x 0 -y 1730 -defaultsOSRD
preplace port port-id_clk -pg 1 -lvl 5 -x 1740 -y 1560 -defaultsOSRD
preplace port port-id_int0 -pg 1 -lvl 0 -x 0 -y 520 -defaultsOSRD
preplace port port-id_int1 -pg 1 -lvl 0 -x 0 -y 820 -defaultsOSRD
preplace port port-id_int2 -pg 1 -lvl 0 -x 0 -y 840 -defaultsOSRD
preplace port port-id_s_axis_record_tfull -pg 1 -lvl 5 -x 1740 -y 1760 -defaultsOSRD
preplace port port-id_int3 -pg 1 -lvl 0 -x 0 -y 880 -defaultsOSRD
preplace portBus rst_n -pg 1 -lvl 5 -x 1740 -y 1670 -defaultsOSRD
preplace inst processing_system7_0 -pg 1 -lvl 4 -x 1460 -y 1530 -defaultsOSRD
preplace inst axi_iic_0 -pg 1 -lvl 4 -x 1460 -y 810 -defaultsOSRD
preplace inst axi_gpio_0 -pg 1 -lvl 4 -x 1460 -y 500 -defaultsOSRD
preplace inst rst_ps7_0_50M -pg 1 -lvl 3 -x 960 -y 1530 -defaultsOSRD
preplace inst xlconcat_0 -pg 1 -lvl 3 -x 960 -y 800 -defaultsOSRD
preplace inst axi_bram_ctrl_0 -pg 1 -lvl 4 -x 1460 -y 80 -defaultsOSRD
preplace inst axi_smc -pg 1 -lvl 1 -x 180 -y 670 -defaultsOSRD
preplace inst axi_dma_0 -pg 1 -lvl 2 -x 560 -y 1130 -defaultsOSRD
preplace inst axis_data_fifo_0 -pg 1 -lvl 4 -x 1460 -y 1250 -defaultsOSRD
preplace inst axis_data_fifo_1 -pg 1 -lvl 4 -x 1460 -y 1750 -defaultsOSRD
preplace inst smartconnect_0 -pg 1 -lvl 3 -x 960 -y 1320 -defaultsOSRD
preplace inst axi_bram_ctrl_1 -pg 1 -lvl 4 -x 1460 -y 220 -defaultsOSRD
preplace inst axi_bram_ctrl_2 -pg 1 -lvl 4 -x 1460 -y 360 -defaultsOSRD
preplace inst axi_iic_1 -pg 1 -lvl 4 -x 1460 -y 1110 -defaultsOSRD
preplace inst axi_dma_1 -pg 1 -lvl 2 -x 560 -y 1300 -defaultsOSRD
preplace inst axi_bram_ctrl_3 -pg 1 -lvl 4 -x 1460 -y 640 -defaultsOSRD
preplace inst axi_bram_ctrl_4 -pg 1 -lvl 4 -x 1460 -y 970 -defaultsOSRD
preplace netloc axi_dma_0_mm2s_introut 1 2 1 770 840n
preplace netloc axi_dma_1_s2mm_introut 1 2 1 780 860n
preplace netloc axi_gpio_0_ip2intc_irpt 1 2 3 780 630 1260J 720 1670
preplace netloc axi_iic_0_iic2intc_irpt 1 2 3 790 640 1190J 730 1670
preplace netloc axi_iic_1_iic2intc_irpt 1 2 3 790 1230 1140J 1330 1670
preplace netloc axis_data_fifo_1_prog_full 1 4 1 NJ 1760
preplace netloc int0_1 1 0 3 NJ 520 NJ 520 760J
preplace netloc int1_1 1 0 3 NJ 820 370J 810 760J
preplace netloc int2_1 1 0 3 NJ 840 390J 820 NJ
preplace netloc int3_1 1 0 3 NJ 880 NJ 880 NJ
preplace netloc processing_system7_0_FCLK_CLK0 1 0 5 40 1030 380 1030 760 1030 1220 1420 1690
preplace netloc processing_system7_0_FCLK_RESET0_N 1 2 3 790 1410 NJ 1410 1660
preplace netloc rst_ps7_0_50M_peripheral_aresetn 1 0 5 30 1040 330 1040 750 1040 1180 1670 NJ
preplace netloc xlconcat_0_dout 1 3 1 1190 800n
preplace netloc axi_bram_ctrl_0_BRAM_PORTA 1 4 1 NJ 80
preplace netloc axi_bram_ctrl_1_BRAM_PORTA 1 4 1 NJ 220
preplace netloc axi_bram_ctrl_2_BRAM_PORTA 1 4 1 NJ 360
preplace netloc axi_bram_ctrl_3_BRAM_PORTA 1 4 1 NJ 640
preplace netloc axi_bram_ctrl_4_BRAM_PORTA 1 4 1 NJ 970
preplace netloc axi_dma_0_M_AXIS_MM2S 1 2 2 720 1220 1210J
preplace netloc axi_dma_0_M_AXI_MM2S 1 2 1 730 1100n
preplace netloc axi_dma_1_M_AXI_S2MM 1 2 1 720 1280n
preplace netloc axi_gpio_0_GPIO 1 4 1 NJ 480
preplace netloc axi_gpio_0_GPIO2 1 4 1 NJ 500
preplace netloc axi_iic_0_IIC 1 4 1 NJ 790
preplace netloc axi_iic_1_IIC 1 4 1 NJ 1090
preplace netloc axi_smc_M00_AXI 1 1 3 310 60 NJ 60 NJ
preplace netloc axi_smc_M01_AXI 1 1 3 330 480 NJ 480 NJ
preplace netloc axi_smc_M02_AXI 1 1 3 320 200 NJ 200 NJ
preplace netloc axi_smc_M03_AXI 1 1 3 340 340 NJ 340 NJ
preplace netloc axi_smc_M04_AXI 1 1 3 N 660 NJ 660 1140J
preplace netloc axi_smc_M05_AXI 1 1 3 380 610 NJ 610 1260J
preplace netloc axi_smc_M06_AXI 1 1 1 350 700n
preplace netloc axi_smc_M07_AXI 1 1 1 340 720n
preplace netloc axi_smc_M08_AXI 1 1 3 370 600 NJ 600 1250J
preplace netloc axi_smc_M09_AXI 1 1 3 390 620 NJ 620 1240J
preplace netloc axis_data_fifo_0_M_AXIS 1 4 1 NJ 1250
preplace netloc axis_data_fifo_1_M_AXIS 1 1 4 400 650 NJ 650 1230J 890 1680
preplace netloc processing_system7_0_DDR 1 4 1 NJ 1480
preplace netloc processing_system7_0_FIXED_IO 1 4 1 NJ 1500
preplace netloc processing_system7_0_M_AXI_GP0 1 0 5 50 1020 NJ 1020 NJ 1020 1200J 1340 1670
preplace netloc s_axis_record_1 1 0 4 NJ 1730 NJ 1730 NJ 1730 NJ
preplace netloc smartconnect_0_M00_AXI 1 3 1 1130 1320n
levelinfo -pg 1 0 180 560 960 1460 1740
pagesize -pg 1 -db -bbox -sgen -150 0 1930 1830
"
}
{
"da_axi4_cnt":"54",
"da_board_cnt":"17",
"da_bram_cntlr_cnt":"3",
"da_clkrst_cnt":"35",
"da_ps7_cnt":"1"
}